Samsung Electronics Partners with Avnet ASIC Israel to Strengthen Customer Support at the Forefront of ASIC Design Services
2018-05-02 09:28:00
Strategic Partnerships
Semiconductor IP News Archive - Page 524 of 1964
Mentor enhances tool portfolio for TSMC 5nm FinFET and 7nm FinFET Plus processes and Wafer-on-Wafer stacking technology
2018-05-02 03:19:00
EDA & Design Tools
Imperas and Andes Extend Partnership, Delivering Models and Virtual Platforms for Andes RISC-V Cores with New AndeStar V5m Extensions
2018-05-01 18:44:00
EDA & Design Tools
Sondrel and NetSpeed Team Up to Deliver the Fastest, Lowest-risk Route to SoC Solutions
2018-05-01 18:19:00
Commercial Deals
Arteris FlexNoC Licensed by Canaan Creative for Artificial Intelligence ASICs
2018-05-01 18:07:00
Commercial Deals
New MIPS I7200 Processor Core Delivers Unmatched Performance and Efficiency For Advanced LTE/5G Communications And Networking IC Designs
2018-05-01 17:58:00
IP Cores & Design
Cadence Prototypes First IP Interface in Silicon for Preliminary Version of DDR5 Standard Being Developed in JEDEC
2018-05-01 17:51:00
IP Cores & Design
Cadence Collaborates with TSMC to Advance 5nm and 7nm+ Mobile and HPC Design Innovation
2018-05-01 17:46:00
EDA & Design Tools
eSilicon deep learning ASIC in production qualification
2018-05-01 16:49:00
Commercial Deals
Cadence Supports New TSMC WoW Advanced Packaging Technology
2018-05-01 09:00:00
EDA & Design Tools
Credo Demonstrates 112G PAM4 and 56G PAM4 SerDes IP Solutions at TSMC 2018 Technology Symposium
2018-05-01 04:31:00
Misc
Spin Transfer Technologies Announces Breakthrough MRAM Technology for SRAM and DRAM Applications
2018-04-30 15:25:00
SoC Architecture & Assembly
Synopsys and TSMC Collaborate to Deliver DesignWare Foundation IP for Ultra-Low Power TSMC 22-nm Processes
2018-04-30 14:59:00
IP Cores & Design
PLDA Announces XpressCCIX Controller IP Supporting The Cache Coherent Interface For Accelerators (CCIX) Standard
2018-04-30 10:45:00
IP Cores & Design
UltraSoC selected by Andes for RISC-V development with trace and debug
2018-04-30 09:39:00
Commercial Deals
SST and UMC Announce Qualification of Embedded SuperFlash Technology on 40 nm CMOS Process
2018-04-30 08:31:00
IP Cores & Design
TSMC Certifies Synopsys Design Platform for High-performance 7-nm FinFET Plus Technology
2018-04-30 07:16:00
EDA & Design Tools
Synopsys Digital and Custom Design Platform Certified for TSMC's Most Advanced 5-nm Process Technology for Early Design Starts
2018-04-30 04:19:00
EDA & Design Tools
Intel Delays 10nm Volume Production Until 2019
2018-04-27 13:40:00
Analysis & Insight
Samsung, GF Ramp FD-SOI
2018-04-27 13:30:00
Analysis & Insight