ARM Unleashes Adaptive Verification IP For On-Chip Communication
2007-06-04 12:11:00
Verification IP
Semiconductor IP News Archive - Page 1383 of 1948
CAST Offers PCI Express Model, Highlights APS 32-bit Processor Cores at DAC 2007
2007-06-04 11:17:00
Misc
TSMC Announces Active Accuracy Assurance Initiative
2007-06-04 10:41:00
Foundries & Process Nodes
TSMC Unveils Reference Flow 8.0 to Address 45nm Design Challenges
2007-06-04 10:38:00
Foundries & Process Nodes
videantis and Pro Design realize real-time H.264/AVC encoding on CHIPit Platinum system
2007-06-04 09:24:00
SoC Architecture & Assembly
FS2 Introduces System Navigator Probe for Development using the New Ultra Low Power Handshake Solutions Memory Extension HT80C51 Core
2007-06-04 03:51:00
SoC Architecture & Assembly
ProDesign Introduces the CHIPit Platinum V5 and Reaches a New Level in High-End ASIC and SoC Prototyping
2007-06-04 01:22:00
Misc
IBM, Chartered and Samsung Extend Integrated DFM Support for Common Platform Technology to 45nm
2007-06-04 01:11:00
Foundries & Process Nodes
Lightspeed Logic collaborates with Cadence to deliver Reconfigurable Logic Reference Flow
2007-06-01 23:10:00
IP Cores & Design
MunEDA's tool family, WiCkeD, is selected by Faraday for its Analog IP Porting
2007-06-01 20:43:00
EDA & Design Tools
Chipidea's New USB PHY Architecture for 1.8V Devices Offers Industry's Lowest Power Consumption for SoC Designers
2007-06-01 04:34:00
IP Cores & Design
Synplicity Announces Agreement to Acquire HARDI Electronics AB
2007-06-01 01:06:00
Strategic Partnerships
Rambus Receives Exception from Nasdaq Listing and Hearing Review Council
2007-05-31 20:43:00
Strategic Partnerships
SiRF GPS IP Powers New Renesas Automotive System on Chip
2007-05-31 16:34:00
Commercial Deals
Sonics and Synopsys Collaborate to Significantly Improve SoC SDRAM Memory Subsystem Performance
2007-05-31 15:36:00
EDA & Design Tools
Cadence and Denali Team Up to Enable Advanced DDR-PHY Methodology
2007-05-31 14:21:00
EDA & Design Tools
CEVA Announces Next Generation CEVA-TeakLite-III DSP Architecture Featuring Native 32-Bit Processing
2007-05-31 13:55:00
IP Cores & Design
Denali and Mentor Team Up to Enable Verification IP for SystemVerilog Verification Environments
2007-05-31 12:43:00
EDA & Design Tools
HARDI Electronics teams with LSI to offer SerDes for ASIC Prototyping
2007-05-31 09:06:00
Misc
Chartered and Mentor Graphics Team to Offer Technology Design Kits for 65 and 90 Nanometer Common Platform Technology Processes
2007-05-31 05:51:00
Foundries & Process Nodes