Silicon Laboratories Grants Limited License for FM Radio Technology to RDA Microelectronics
2010-08-26 14:35:00
Commercial Deals
Semiconductor IP News Archive - Page 1128 of 1965
Arasan Chip Systems First to release UHS-II PHY IP Core
2010-08-26 13:52:00
IP Cores & Design
China's Godson gets vector boost, aims for 28 nm
2010-08-26 07:47:00
SoC Architecture & Assembly
MIPI Alliance Announces New RF Front End Control Interface Specification for Mobile Devices
2010-08-26 07:06:00
Misc
Mentor Graphics Collaborates with GLOBALFOUNDRIES to Provide Easier Debugging Capability to IC Designers
2010-08-26 03:06:00
EDA & Design Tools
Synopsys DesignWare SATA IP Enables First-Pass Silicon Success for Global Unichip Corporation
2010-08-25 15:02:00
IP Cores & Design
MindTree Launches Bluetooth RF IP Enabling Complete SoC Integration
2010-08-25 13:02:00
IP Cores & Design
Certus Semiconductor Joins IPextreme's Constellations Program
2010-08-25 09:08:00
Strategic Partnerships
Icahn increases stake in Mentor to 15%
2010-08-25 07:19:00
Strategic Partnerships
Anchor Bay Introduces Intellectual Property Licensing Program
2010-08-25 06:44:00
Strategic Partnerships
Discretix Multi-Scheme DRM Supports Microsoft PlayReady, to Enable Premium Content on Connected Devices
2010-08-25 06:26:00
SoC Architecture & Assembly
OCP-IP Delivers Transaction Generator Package
2010-08-24 15:34:00
EDA & Design Tools
Synopsys Announces Immediate Availability of DesignWare MIPI M-PHY IP in 40-nm Process Technology
2010-08-24 15:06:00
IP Cores & Design
Renesas Electronics and Acacia Research Enter into Strategic Patent Licensing Alliance
2010-08-24 14:19:00
Strategic Partnerships
Update: ARM7 gets 40-bit, virtualization support
2010-08-24 14:02:00
IP Cores & Design
Innopower Unveils iPaaS IP program
2010-08-24 13:48:00
Strategic Partnerships
Mentor moves tools toward 16-nanometer
2010-08-24 09:04:00
Analysis & Insight
Mindspeed to Present Next Generation of 4G Base Station Technology
2010-08-24 04:31:00
SoC Architecture & Assembly
Winbond Adopts SpringSoft Laker Layout and Routing Systems for Design of High Performance, Low Power Memory Chips
2010-08-24 04:06:00
EDA & Design Tools
STARC, Calypto and Virage Logic Break New Ground With Industry's Lowest Power Design Flow
2010-08-24 02:15:00
EDA & Design Tools