SiliconBlue 65-nm FPGAs run on microamps
Peter Clarke, EE Times
(03/07/2008 11:42 AM EST)
LONDON — SiliconBlue Technologies Corp. (Sunnyvale Calif.) is offering a family of low-power FPGAs implemented on a 65-nm CMOS manufacturing process. The FPGAs, which carry their own non-volatile memory on-chip for holding configuration data, come in small ball grid array packages and are intended for use in mobile phones and other handheld devices.
The company was founded by Kapil Shankar, CEO, a 20-year veteran of the programmable logic industry, and Antti Kokkinen, a partner and cofounder of venture capital firm BlueRun Ventures (Menlo Park, Calif.).
(03/07/2008 11:42 AM EST)
LONDON — SiliconBlue Technologies Corp. (Sunnyvale Calif.) is offering a family of low-power FPGAs implemented on a 65-nm CMOS manufacturing process. The FPGAs, which carry their own non-volatile memory on-chip for holding configuration data, come in small ball grid array packages and are intended for use in mobile phones and other handheld devices.
The company was founded by Kapil Shankar, CEO, a 20-year veteran of the programmable logic industry, and Antti Kokkinen, a partner and cofounder of venture capital firm BlueRun Ventures (Menlo Park, Calif.).
To read the full article, click here
Related Semiconductor IP
- Ultra Ethernet MAC & PCS 100G/200G/400G/800G
- Ethernet PCS 100G/200G/400G/800G/1.6T
- Ethernet MAC 100G/200G/400G/800G/1.6T
- Junction Over-Temperature Detector with Linear Centigrade-to-Voltage Output - X-FAB XT018
- Performance P570 Gen 3
Related News
- Texas Instruments and Continental collaborate to deliver first 65 nm safety ARM Cortex microcontroller used in advanced automotive safety applications
- Dolphin Integration offers first standard cell library to enable a leakage reduction of 1/350 at 65 and 55 nm
- AMI Semiconductor Expands Digital IP Library with the Addition of 65 Inventra Cores
- Toshiba Will Apply Sarnoff's TakeCharge IC Design Approach To Chip Processes Down To 65 Nanometer
Latest News
- SkyeChip Berhad Delivers 35.0% Net Profit Growth Ahead of Main Market Debut on 20 May 2026
- Quantum eMotion and JMEM TEK Sign Consortium Agreement to Accelerate Quantum-Resilient Semiconductor SoC Development
- Silvaco Announces Immediate Availability of Mixel MIPI C-PHY/D-PHY Combo IP on TSMC N2P Process
- BrainChip Strikes IP Licensing Deal with ASICLAND
- Arteris Technology Adopted by Li Auto for Intelligent Vehicles