RISC-V Available in Silicon
One of the announcements at the recent RISC-V workshop was by SiFive. This is the company started by the creators of the RISC-V instruction set architecture (Krste, Andrew, and Yunsup) to commercialize silicon implementations.
Four months ago, at the previous RISC-V workshop, they announced FPGA implementations of the two flavors, Freedom Everywhere (32-bit microcontroller) and Freedom Unleashed (64-bit multi-core, high performance). They also announced that silicon would be coming "soon."
Well, it is now "soon."
To read the full article, click here
Related Semiconductor IP
- RISC-V Display Connectivity Subsystem (DCS)
- RISC-V IOPMP IP
- RISC-V Debug & Trace IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- 64-bit RISC-V core with in-order single issue pipeline. Tiny Linux-capable processor for IoT applications.
Related Blogs
- Experts Talk: RISC-V CEO Calista Redmond and Maven Silicon CEO Sivakumar P R on RISC-V Open Era of Computing
- From vision to reality in RISC-V: Interview with Karel Masarik
- Advanced RISC-V Training Course | Maven Silicon - RISC-V Global Training Partner
- TetraMem Delivers RISC-V AI Accelerator Tape-Out in Record Time on Synopsys Cloud
Latest Blogs
- A Repeatable Framework for Hardware Security Assurance
- Inside the SiFive Performance™ P570 Gen 3: High Performance Efficiency for Next-Generation Consumer and Commercial Applications
- What the steam engine can teach us about modern chip design
- Automotive silicon in the era of AI, functional safety, and cybersecurity
- JPEG XS Officially Joins GenICam, The Machine Vision Standard Managed By EMVA