Virtual Silicon ramping 0.10-micron libraries, IP

Virtual Silicon ramping 0.10-micron libraries, IP
By Michael Santarini, EE Times
October 1, 2001 (10:28 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011001S0025

Virtual Silicon Technology Inc. has announced it is developing 0.10-micron libraries and associated intellectual property (IP) for undisclosed foundry processes.

John Ford, vice president of marketing for Virtual Silicon, said the company received its first order for 0.10-micron IP in August and is expecting the offerings to be available by the first quarter of next year. The company is developing standard cells, basic I/Os, interface products, memory compilers and instances, and a programmable PLL compiler, he said.

Ford said that unlike the 0.25- and 0.18-micron processes, which had minimal variation from foundry process to foundry process, 0.10-micron processes vary greatly, requiring library and IP developers to work very closely with foundry partners.

"The processes are becoming far more complicated and there are more folks in the road that product development people have to go through," said Ford. "One company now can use different variations of metallurgy such as copper and mixed aluminum-copper. They can use new low-k dielectric materials as well as use new lithography systems."

Ford said that one thing that has become apparent to the developers at Virtual Silicon in working with foundry partners on the new processes is that the bleeding-edge EDA tools that are savvy to signal-integrity issues will become essential.

"At this particular point, we think 0.10 micron is going to break a lot of traditional tool methods. Tools are going to have to support signal integrity and look at IR drop. All the tools that people have been talking about for the last few years are absolutely going to be required at 0.10."

Ford said foundries are paying Virtual Silicon to develop the libraries and that Virtual Silicon expects to have the foundries pay the company royalties as customers start rolling out chips on the 0.10-micron processes.

Foundries will likely have separate process and library offerings for th eir high-performance lines, high-density lines and low-power lines, he said.

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Sanyo Semiconductor Co. (Tokyo) has agreed to license an MPEG-4 video codec core from Hantro Products Ltd. Sanyo will use the core in chips for a handheld personal digital assistant (PDA) now in development in Japan.

"In this early phase of mobile video, the PDA market is very interesting, as there are good displays and other facilities available for video applications," said Eero Kaikkonen, chief executive officer and president of Hantro (Oulu, Finland). "We see PDAs as a natural step in the evolution of video applications. Wireless video will first be implemented in PDAs before it can be utilized by midrange mobile phones. This revenue-generating deal with up-front license fee and royalties justifies that we are on the right track in our business-model development."

"Sanyo and our customers have lofty demands for high resolution and picture quality, but Hantro's technology and prototypes convi nced us that those demands are accessible," said Toru Watanabe of Sanyo Semiconductor.

Hantro's MPEG-4 codec has been designed as a system-on-chip solution for wireless handsets with low power consumption and low processor loading in mind, the company said.