Verplex Formal Verification Software Chosen by Tensilica
MILPITAS, Calif.--(BUSINESS WIRE)--March 13, 2002--Tensilica® Inc., the leading supplier of extensible, configurable processor intellectual property (IP), has selected Verplex(TM) Systems, Inc. for formal verification software. The company uses the Verplex Conformal(TM) Logic Equivalence Checker (LEC), and suggests the Verplex design flow to its customers. In addition, Tensilica provides Conformal LEC files to customers along with its semiconductor intellectual property.
"Tensilica customers demand high-performance verification tools," says Kaushik Sheth, chief engineer at Tensilica. "Our experience to date with Verplex' Conformal LEC makes it easy for us to suggest it to our customers as well."
"Tensilica is an important partner and a customer with rigorous requirements," adds Tom Senna, vice president of Marketing and Business Development. "We're pleased that Tensilica has successfully verified its products using Conformal LEC and is willing to recommend it to its customers."
For more information about Verplex' support for Tensilica, contact Bassilios Petrakis, Verplex technical business manager, at (408) 586-0362 or via email at petrak@verplex.com. More details about Verplex can be found at its Web Site: http://www.verplex.com.
About Verplex
Verplex Systems Inc. is an electronic design automation (EDA) company focused on delivering the highest speed, highest capacity and easiest to use formal verification products for complex system-on-chip (SOC) design. Founded in 1997, it is privately held and funded by leading venture capital firms. Corporate headquarters is located at 300 Montague Expressway, Suite 100, Milpitas, Calif. 95035. Telephone: (408) 586-0300. Facsimile: (408) 586-0230. Email: info@verplex.com. Online information is found at its web site: http://www.verplex.com.
Verplex, Conformal and BlackTie are trademarks of Verplex Systems Inc. All other companies and products referenced herein are trademarks or registered trademarks of their respective holders.
Contact:
For Verplex Systems:
Nanette Collins
(617) 437-1822
nanette@nvc.com
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Siemens brings formal methods to high-level verification with C++ coverage closure and property checking
- NEC Corporation Standardizes on Verplex Formal Verification Tools
- Get2Chip synthesis linked to Verplex formal tool
- Xilinx, Verplex Collaborate to Provide Formal Verification At Various Stages of FPGA Design Flow
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack