IEF: TSMC pushes innovation for recovery
Peter Clarke, EETimes
10/6/2011 3:33 AM EDT
Despite the uncertainty engendered by global economic conditions Marced's argument was that the industry as a whole must innovate to get out of the current slow down and that TSMC would be taking this advice with 20-nm process technology being introduced in "risk production" in the third quarter of 2012.
To read the full article, click here
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
Related News
- Analog Bits to Demonstrate Power Management and Embedded Clocking and High Accuracy Sensor IP at the TSMC 2024 Open Innovation Platform Ecosystem Forum
- Ausdia Joins TSMC Open Innovation Platform® (OIP) EDA Alliance
- M31 Collaborates with TSMC to Advance 2nm eUSB2 IP Innovation
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
Latest News
- Arasan Announces immediate availability of its UFS 5.0 Host controller IP
- Bolt Graphics Completes Tape-Out of Test Chip for Its High-Performance Zeus GPU, A Major Milestone in Reducing Computing Costs By 17x
- NEO Semiconductor Demonstrates 3D X-DRAM Proof-of-Concept, Secures Strategic Investment to Advance AI Memory
- M31 Collaborates with TSMC to Achieve Tapeout of eUSB2V2 on N2P Process, Advancing Design IP Ecosystem
- Menta’s eFPGA Technology Adopted by AIST for Cryptography and Hardware Security Programs