Rambus Announces Industry's First 10 Gbps Backplane Serial Link Solution

RaSer™ X Quadruples the Capacity of Existing Copper Backplanes in Networking, Server and Storage Equipment

LOS ALTOS, Calif., October 28, 2002 – Rambus Inc. (Nasdaq:RMBS), the world's leading developer of chip-to-chip interface technology, today announced the industry's highest-speed and most flexible serial link cell, named RaSer™ X, at the Chip2Chip Conference held at The Fairmont Hotel in San Jose, California. The RaSer X cell runs up to 10 Gbps on a single connection and offers designers a low-cost, standard CMOS solution that extends bandwidth performance in backplanes without requiring drastic changes to existing equipment. This new cell enables system designers to quadruple the capacity of existing networking, blade server and storage boxes by simply providing a new line card and switch card.

"The capacity of networking equipment needs to be as scalable as possible to enable the longest time of operation and the lowest total cost of ownership possible," said Jeremey Donovan, vice president and chief analyst at Gartner Dataquest. "System designers need backplane serial link solutions that can push speeds to beyond 10 Gbps per connection and offer the flexibility to tackle a variety of protocols, applications and frequency ranges. As system capacity requirements continue to increase, enterprise users need to optimize existing equipment investments."

RaSer X technology enables superior high-bandwidth serial link cells that offer customers the following advantages:

• Highest speed and performance: This quadruples the performance on existing backplanes, using easily available FR4 material. RaSer X enables increased port rates and port densities on a given backplane.
• Most flexible solution available: It offers a wide frequency range (1 to 10 Gbps) and is backward compatible. Additionally, RaSer X is the first serial link to support a dual 2-PAM/4-PAM (2-level and 4-level) signaling technology on a single product.
• Lower cost and power: It allows designers to reduce the number of connector pins and backplane layers, which translates to a 4X reduction in processing costs.
• A safe choice: It has been tested over a dozen backplane environments, and is a proven and safe choice.

Jared Zerbe, Director of Engineering at Rambus Inc., demonstrates the industry’s first 10 Gbps serial link cell, which increases the life of existing networking backplanes by 4 times.

"Our customers have been looking for ways to increase total system capacity within a fixed form factor," said Kevin Donnelly, vice president of the Network Connections Division at Rambus. "RaSer X is enabling the transition to 10 Gbps backplanes by providing the integration, cost savings and speed required in today's competitive market. At a time when service matters most, RaSer X offers the highest backplane bandwidth to enable system vendors to improve the quality of service for their customers at virtually no incremental system cost." The RaSer X 10 Gbps cell is available in a TSMC 0.13-micron CMOS process for licensing and integration into customer designs. RaSer X was demonstrated for the first time at today's Chip2Chip Conference. For more information about the conference, please visit the web site at www.chip2chipconference.com.

Rambus RaSer cells are offered as an analog core library cell for ASIC and ASSP designs. The Rambus RaSer technology is optimized to meet today's and future network and I/O communication requirements. Rambus is continuing to develop higher-speed serial channels, which can be integrated in low-cost, CMOS processes. RaSer cells are available in single-, dual- and quad-channel configurations, across a range of speeds (1 to 10 Gbps). Rambus currently has 14 licensees for its RaSer technology, including Intel, Internet Machines, Banderacom and TranSwitch.

About Rambus Inc.
Rambus is the leading developer and marketer of breakthrough chip-to-chip interface technology, products and solutions to the electronics industry. The company licenses its technology in the form of ASIC cells that are incorporated into high-performance memory and logic chips by 25 of the world’s top semiconductor makers. The company’s ASIC cells and system-level solutions are incorporated into hundreds of unique electronic products.

Rambus is a registered trademark, and RaSer is a trademark of Rambus Inc. Other trademarks that may be mentioned in this release are the intellectual property of their respective owners.

This press release contains forward-looking statements. These statements are based on current expectations, estimates and projections about the Company's industry, management's beliefs, and certain assumptions made by the Company's management. You can identify these and other forward-looking statements by the use of words such as "may," "will," "should," "expects," "plans," "anticipates," "believes," "estimates," "predicts," "intends," "potential," "continue" or the negative of such terms, or other comparable terminology. Forward-looking statements also include the assumptions underlying or relating to the foregoing statements. Actual results could differ materially from those anticipated in these forward-looking statements as a result of various factors, including those identified in the Company's recent filings with the Securities and Exchange Commission, including its recently filed Form 10-Q, and also including the uncertainty of new technologies; and the uncertainty regarding the technical and market demands for such technologies. All forward-looking statements included in this press release are based on information available to Rambus on the date hereof. Rambus assumes no obligation to update any forward-looking statements.