Mentor package helps verify TI DSPs
By
February 24, 2004 (11:14 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010227S003961
Related Semiconductor IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- Parameterizable compact BCH codec
- 1G BASE-T Ethernet Verification IP
- Network-on-Chip (NoC)
- Microsecond Channel (MSC/MSC-Plus) Controller
Related News
- TI fires up C64X-based DSPs for 3G wireless run
- Intel's XScale platform takes shot at TI DSPs
- 0-In Design Automation Helps AMD Verify Complex Networking and Processor Chipsets
- Mentor Graphics Announces EZ-VIP Package for Enhanced Testbench Productivity
Latest News
- ISOLDE Project Demonstrates Advancements in European Open-Source RISC-V for Automotive, Space, and IoT
- ACL Digital and AIM FUTURE Partner to Drive Innovation in Edge AI
- Tenstorrent and PwC Partner to Advance AI Ecosystem Development in Cyprus
- Republic of Cyprus Selects Tenstorrent for AI Innovation
- SiFive and IAR Collaborate to Advance the Automotive Ecosystem and Drive RISC-V Innovation in Automotive Electronics