Intel has late metal fix for design error
Peter Clarke, EETimes
1/31/2011 6:12 PM EST
SANTA CLARA, Calif. – Some more details of a design error in a companion chip to the Sandy Bridge processor – and the fix being implemented – have emerged in a conference call held by Intel with financial analysts to discuss the issue and the impact on Intel's revenues and margins.
The chip, known as Series 6 or Cougar Point, passed rigorous functional testing performed by both Intel and its OEMs but nonetheless there is a problem which can show up in a low percentage of chips, according to Steve Smith, vice president of PC client operation enabling, speaking on the call.
To read the full article, click here
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
Related News
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- IC’Alps joins Intel Foundry Accelerator program as Value Chain Alliance (VCA) and Design Services Alliance (DSA) partner
- Aion Silicon Joins Intel Foundry Accelerator Value Chain Alliance to Design and Deliver Best-in-Class ASIC and SOC Solutions
Latest News
- Mixel MIPI IP Integrated into Automotive Radar Processors Supporting Safety-critical Applications
- GlobalFoundries and Navitas Semiconductor Partner to Accelerate U.S. GaN Technology and Manufacturing for AI Datacenters and Critical Power Applications
- VLSI EXPERT selects Innatera Spiking Neural Processors to build industry-led neuromorphic talent pool
- SkyWater Technology and Silicon Quantum Computing Team to Advance Hybrid Quantum-Classical Computing
- Dnotitia Revolutionizes AI Storage at SC25: New VDPU Accelerator Delivers Up to 9x Performance Boost