Gaisler Research AB is awarded a contract for development of a System on Chip (SoC) ASIC
May 16, 2005 -- A contract has been signed by Gaisler Research AB and Saab Ericsson Space AB. The aim of the contract is to develop and validate a System on a Chip ASIC intended for future European Space missions. The ASIC is based on the fault tolerant LEON2 processor, with additional functions to interface various equipment and payload within a spacecraft.
"This contract is yet another example where the LEON processor is used in complex System On a Chip designs. The use of the GRLIB IP- library, ideally suited for SoC designs and implementing plug and play capabilities, greatly minimizes the engineering effort" says Sandi Habinc the System Manager of Gaisler Research AB.
About Gaisler Research AB
Gaisler Research AB is a provider of SoC solutions for exceptionally competitive markets such as Aerospace, Military and demanding Commercial applications. The Gaisler Research's products consist of user-customizable 32-bit SPARC V8 processor cores, peripheral IP-cores and associated software and development tools. Gaisler Research solutions help companies develop highly competitive customer and application-specific SoC designs.
"This contract is yet another example where the LEON processor is used in complex System On a Chip designs. The use of the GRLIB IP- library, ideally suited for SoC designs and implementing plug and play capabilities, greatly minimizes the engineering effort" says Sandi Habinc the System Manager of Gaisler Research AB.
About Gaisler Research AB
Gaisler Research AB is a provider of SoC solutions for exceptionally competitive markets such as Aerospace, Military and demanding Commercial applications. The Gaisler Research's products consist of user-customizable 32-bit SPARC V8 processor cores, peripheral IP-cores and associated software and development tools. Gaisler Research solutions help companies develop highly competitive customer and application-specific SoC designs.
Related Semiconductor IP
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Ultra-Low-Power Temperature/Voltage Monitor
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
Related News
- Gaisler Research AB is awarded a contract for developing the LEON4 processor
- BrainChip Awarded Air Force Research Laboratory Radar Development Contract
- Chip Interfaces, through its JESD204C IP, supports Extoll’s collaboration in the development of Eridan’s next-generation ASIC
- Key Asic Berhad Signs RM1.11 Million Contract to Jointly Develop AI-Driven, Ultra-Low Power RF Navigation Chip with Middle East Partner
Latest News
- Siemens accelerates integrated circuit design and verification with agentic AI in Questa One
- Weebit Nano achieves record half-year revenue; licenses ReRAM to Tier-1 Texas Instruments
- IObundle Releases Open-Source UART16550 Core for FPGA SoC Design
- Rapidus Secures 267.6 Billion Yen in Funding from Japan Government and Private Sector Companies
- DNP Invests in Rapidus to Support the Establishment of Mass Production for Next-Generation Semiconductors