DMP 3D Graphics IP Core "PICA200 Lite" is adopted for OLYMPUS PEN Lite E-PL5.OLYMPUS PEN mini E-PM2
Tokyo, Japan– November 6th, 2012 – Digital Media Professionals Inc. (DMP), a leading provider of 2D/3D graphics Intellectual Property (IP) cores, today announced DMP 3D graphics IP core “PICA200 Lite” is adopted for OLYMPUS PEN Lite E-PL5 and OLYMPUS PEN mini E-PM2 cameras of Olympus Imaging Corporation.
3D graphics IP Core PICA200 Lite offers industry leading performance vs area and smaller die size compared to competitive offering. PICA200 Lite is optimized for GUI (Graphical User Interface) and imaging applications and based on OpenGL ES1.1 specification.
“Olympus Imaging provides 7 variation of digital cameras that deploy our PICA200 Lite product , including these latest two models” said Tatsuo Yamamoto, CEO of DMP. “DMP provides a leading scalability through its PICA/SMAPH IP cores for easy-to-use and high quality UIs in consumer devices including digital cameras. One of the leading technology advantages of the PICA/SMAPH series is based on advanced power gating technology that enables minimized product cost and long battery life to meet the industry expectations in wide variety of consumer devices.”
About DMP
Digital Media Professionals Inc. (DMP)(TOKYO:3652) develops industry leading 2D and 3D graphics solutions for global consumer electronics, mobile, embedded and automotive markets. The company was founded in Tokyo, Japan in 2002 and is currently developing several graphics IP cores based on the open Khronos™ Group standards and DMP’s cutting edge 3D graphics technology “DMP Maestro Technology”.
Related Semiconductor IP
- OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
- High-performance and low-power 3D graphics IP core
- 3D Graphics IP
- 3D Graphics IP
- 3D Graphics IP
Related News
- DMP 3D Graphics IP Core "PICA200 Lite" is adopted for OLYMPUS Tough TG-1
- DMP 3D Graphics IP Core "SMAPH-S" is selected by Renesas Electronics
- Olympus adopts DMP's Hybrid Graphics IP core for OLYMPUS OM-D E-M1
- STMicroelectronics and Politecnico di Milano Build FASTER 3D Graphics Application using FPGAs
Latest News
- Menta’s eFPGA Technology Adopted by AIST for Cryptography and Hardware Security Programs
- Silicon Creations Celebrates 20 Years of Global Growth and Leadership in 2nm IP Solutions
- TSMC Debuts A13 Technology at 2026 North America Technology Symposium
- Cadence Collaborates with TSMC to Accelerate Design of Next-Generation AI Silicon
- Synopsys Partners with TSMC to Power Next-Generation AI Systems with Silicon Proven IP and Certified EDA Flows