DesignCon: Nvidia's engineering VP wants better design tools
Brian Fuller, EETimes
1/29/2013 6:10 PM EST
"Engineers don't complain enough," said Jonah Alben, Nivida's senior vice president of engineering, said during a keynote address at the DesignCon conference here.
To read the full article, click here
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
Related News
- Flex Logix Appoints Abhijit Abhyankar as VP Silicon Engineering
- Sidense Hires Industry Veteran Ken Wagner as Senior VP Engineering
- AMIQ EDA Announces its Design and Verification Tools Eclipse IDE Supports Cadence Perspec System Verifier using System Level Notation
- AMIQ EDA Announces its Design and Verification Tools Eclipse IDE Supports First Release of Accellera Portable Test and Stimulus Standard (PSS)
Latest News
- Bolt Graphics Completes Tape-Out of Test Chip for Its High-Performance Zeus GPU, A Major Milestone in Reducing Computing Costs By 17x
- NEO Semiconductor Demonstrates 3D X-DRAM Proof-of-Concept, Secures Strategic Investment to Advance AI Memory
- M31 Collaborates with TSMC to Achieve Tapeout of eUSB2V2 on N2P Process, Advancing Design IP Ecosystem
- Menta’s eFPGA Technology Adopted by AIST for Cryptography and Hardware Security Programs
- Silicon Creations Celebrates 20 Years of Global Growth and Leadership in 2nm IP Solutions