64-bit Initiator/Target for PCI-X & 32- and 64-bit Initiator/Target for PCI
DO-DI-PCIX64-VE rolls the Initiator/Target for PCI ™/PCI-X ™, 32-bit Initiator/Target for PCI and 64-bit Initiator/Target for PCI…
64-bit Initiator/Target for PCI-X & 32- and 64-bit Initiator/Target for PCI
DO-DI-PCIX64-VE rolls the Initiator/Target for PCI ™/PCI-X ™, 32-bit Initiator/Target for PCI and 64-bit Initiator/Target for PCI…
64-bit Initiator/Target for PCI-X & 32- and 64-bit Initiator/Target for PCI
DO-DI-PCIX64-VE rolls the Initiator/Target for PCI ™/PCI-X ™, 32-bit Initiator/Target for PCI and 64-bit Initiator/Target for PCI…
The EP423 64-bit PCI-X host bridge core is optimized to operate in both PCI mode and PCI-X mode.
The PCI-X transceiver is a IP version of PCI-X I/O pads, which is fully compatible with PCI-X R1.0 specification.
PCI-X Controller IP, PCIX 1.0b, Soft IP
PCI-X 1.0b device/host bridge controller.
64-bit PCI-X Master/Target
Specialty PCI IO IP, UMC 90nm SP process
UMC 90nm Low-K SP process true 3.3V PCI-X IO cells Library for Intellon.
Specialty PCI IO IP, UMC 65nm SP process
UMC 65nm SP/RVT Low-K Logic process 2.5VOD3.3V PCI-X IO Cell Library.
Specialty PCI IO IP, BOAC (Bonding Over Active Circuit), UMC 65nm SP process
UMC 65nm SP/RVT Low-K Logic process 2.5VOD3.3V PCI-X BOAC IO Cell Library.
Specialty PCI IO IP, BOAC (Bonding Over Active Circuit), UMC 0.18um G2 process
UMC 0.18um GII Logic process 3.3V PCIX IO with POC (Pad On Circuit).
Specialty PCI IO IP, BOAC (Bonding Over Active Circuit), UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG process PCIX IO for BOAC.
Specialty PCI IO IP, UMC 0.13um HS/FSG process
UMC 0.13um HS process PCI-X IO Cells.
1.8V/3.3V GPIO Compliant with Multiple Standards in TSMC 16nm
High-Voltage Single-Ended / Differential I/O Macro in TSMC 16FFC This library is a high-voltage GPIO I/O Macro in TSMC 16nm.
PCIe Testbench from Rambus emulates a Root Complex device enabling simulation of a PCI Express design.