Multiport Memory Controller IP Listing

MPMC is a fully parameterizable memory controller that supports SDRAM/DDR/DDR2 memory.

• DDR

The UMMC Controller is a flexible and configurable design.

• DDR

The UMMC (Universal Multi-port Memory Controller for RLDRAM2/3, DDR5/4/3, DDR4 3DS and LPDDR3/2 and LPDDR3/2) is a flexible and c…

• DDR

A dedicated embedded block multi-port memory controller that greatly simplifies the task of interfacing Spartan-6 devices to the …

• DDR
• 2014

Xilinx provides a Video DMA core for high performance DMA memory access in video processing systems.

• DMA

The Avalon Multi-port DDR2 Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II processor in…

• DDR
• Available for immediate sale

The Streaming Multi-port SDRAM Memory Controller IP Core provides a native RD or WR local port bus interface to SDRAM memory.

• DDR
• Over 5 years mature
• Available for immediate sale

The Microtronix Avalon Multi-port SDRAM Memory Controller IP Core is designed for maximizing the performance of an Altera Nios II…

• DDR
• Available for immediate sale

The Rambus Multi-Port Front-End Core from Rambus provides a multi-port interface to Rambus Memory Controller Cores.

• Analog Front End
• Now

LPDDR5X, LPDDR5, LPDDR4X, LPDDR4, LPDDR3 Controller The Cadence Denali PHY and Controller for LPDDR5X/5/4X/4/3 is a family of hig…

• LPDDR

DDR5, DDR4, DDR3 Controller The DDR solutions, a family of high-speed on-chip interface IP, are the way for high-performance comp…

• DDR

High-performance IP for graphics, AI/ML, and automotive products The silicon-proven GDDR6 PHY and controller IP showcase -edge BE…

• GDDR
• Silicon proven

LPDDR5X, LPDDR5, LPDDR4X, LPDDR4, LPDDR3 PHY and Controller The DDR/LPDDR PHY IP, a family of high-speed on-chip interface IP, pr…

• DDR
• Silicon proven

The Microtronix Avalon Mobile DDR SDRAM Memory Controller IP Core is designed for building high-performance Avalon-MM / Avalon-ST…

• DDR
• Available for immediate sale

Increasing SoC/ASIC devices' complexity also demands increase in memory bandwidth.

• DDR
• In volume production silicon
• Now
• DDR1, DDR2, DDR

DDRI/II/III Memory Controller Core implements an efficient and pipelined interface to DDR-I, DDRII and DDR-III SDRAM devices targ…

• DDR
• Available

Rambus’s AXI Interface Core is designed for use in applications requiring ARM’s eXtensible Interface (AXI).

• Protocol Bridge

Dolphin Technology's hardened DDR5/4/3/2 SDRAM PHY and LPDDR5/4x/4/3/2 SDRAM PHY IP is a silicon-proven.

• Single-Protocol PHY

The LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memo…

• LPDDR
• Now
• LPDDR5

The LPDDR4X/4 controller core is designed for use in applications requiring high memory throughput at low power including mobile,…

• LPDDR
• Now
• LPDDR4