224G-LR SerDes PHY enables 1.6T and 800G networks
The ever-increasing bandwidth in high-performance computing (HPC) applications is driving the rapid growth of high-speed I/O capa…
Ethernet PCS 1G/2.5G/5G/10G/25G & CPRI 7.0
A combined silicon agnostic implementation of the PCS layer compliant with Ethernet standard IEEE 802.3-2018 and CPRI Specificati…
Silicon agnostic implementation of the Physical Coding Sublayer (PCS) compliant with Ethernet standard IEEE 802.3-2018 The Ethern…
High Speed Ethernet Quad 10G to 100G PCS
The 100G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the IEEE 802.3 standard, provides a set of features that enab…
High Speed Ethernet Gen-2 Quad 100G PCS IP
The 100G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the IEEE 802.3 standard, provides a set of features that enab…
High Speed Ethernet 4/2/1-Lane 100G PCS
The 100G Ethernet Physical Coding Sublayer (PCS) IP, compliant with the IEEE 802.3 standard, provides a set of features that enab…
Simulation VIP for Ethernet FlexE
The Cadence® Verification IP (VIP) for Flexible Ethernet (FlexE) provides a mature, capable compliance verification solution for …
Simulation VIP for Ethernet Base-T1
Mature and capable compliance verification solution.ncorporating the latest protocol updates, the mature and comprehensive Cadenc…
Silicon agnostic Ethernet TSN MAC IP with speeds of 40G and 100G, based IEEE 802.3 Ethernet Layer 2 solution with support for key…
Ethernet TSN MAC 10M/100M/1G/2.5G
Silicon agnostic Ethernet TSN MAC IP, IEEE 802.3 Ethernet Layer 2 solution with support for key TSN features The TSN MAC 10M/100M…
Silicon agnostic Ethernet TSN MAC IP with speeds of 10G and 25G, based IEEE 802.3 Ethernet Layer 2 solution with support for key …
Enterprise Ethernet MAC Controller IP
The Enterprise Ethernet Media Access Controller (MAC) IP (XLGMAC) enables a host to transmit and receive data over Ethernet in co…
DSP 10/100 100B-TX Ethernet PHY
SMS 10/100 ETHERNET PHY performs IEEE 802 10Base-T and 100Base-TX functionality as illustrated in Block diagram.
Intel® Agilex™ 7 and Intel® Stratix® 10 FPGA E-Tile Hard IP
The Intel® Agilex™ 7 and Intel® Stratix® 10 FPGA E-Tile incorporates a configurable, hardened Ethernet protocol stack compatible …
The 1.6T Ethernet MAC IP implements the functions required by the IEEE 802.3-2018 specification to communicate over Ethernet prov…
Low-Latency 10/100/1000 Ethernet MAC
The LLEMAC-1G implements an Ethernet Media Access Controller (MAC) compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.…
Gigabit Ethernet Media Access Control (MAC) SystemVerilog OVC VIP is fully documented,off-the-shelf component for the Developers …
The Ethernet Media Access Controller IP is an embedded Fast Ethernet controller module.
This IP core implements the 25G and 50G Ethernet Specification, Draft 1.4 from the 25 Gigabit Ethernet Consortium.
Complete 1.6T Ultra Ethernet IP Solution
The 1.6T Ultra Ethernet IP solution, consisting of 1.6T MAC and PCS multi-rate Ultra Ethernet controllers, silicon proven 224G an…