SMIC 55nm High-Speed RVT Standard Library for Power Management Kit.
SMIC 55nm High-Speed RVT Standard Library for Power Management Kit.
- SMIC
- 55nm
- LL
- In Production
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
SMIC 55nm High-Speed RVT Standard Library for Power Management Kit.
SMIC 55nm High-Speed RVT Standard Library for Power Management Kit.
SMIC 55nm High-Speed RVT Standard Library for Low Leakage Process.
SMIC 55nm High-Speed RVT Standard Library for Low Leakage Process.
SMIC 55nm High-Speed LVT Standard Library for Low Leakage Process.
SMIC 55nm High-Speed LVT Standard Library for Low Leakage Process.
SMIC 55nm High-Speed LVT for PEK(Performance Enhancement Kit)Standard Library.
SMIC 55nm High-Speed HVT Standard Library for Low Leakage Process.
SMIC 55nm High-Speed HVT Standard Library for Low Leakage Process.
SMIC 55nm LL(RVt) high density standard cells library.
SMIC 55nm LL(RVt) high density standard cells library.
SMIC 55nm LL(LVt) high density standard cells library.
SMIC 55nm LL(LVt) high density standard cells library.
SMIC 55nm LL(HVt) high density standard cells library.
SMIC 55nm LL(HVt) high density standard cells library.
55LL Ultra-High Speed SRAM instances with SVT bit cell.
55LL Ultra-High Speed SRAM instances with SVT bit cell.
55LL general Two-ports Register File compiler with HVT bit cell.
55LL general Two-ports Register File compiler with HVT bit cell.
55LL general SP SRAM compiler with HVT bit cell.
55LL general SP SRAM compiler with HVT bit cell.
55LL general One-port Register File compiler with HVT bit cell.
55LL general One-port Register File compiler with HVT bit cell.
55LL general DP SRAM compiler with HVT bit cell.
55LL general DP SRAM compiler with HVT bit cell.
55LL general VIA ROM compiler
SMIC 55nm LL 32KHz clock oscillator with low power consumption
IP
SMIC 55nm LL 32KHz clock oscillator
IP
IP
IP
SMIC 55nm LL ESD protection cell
IP
SMIC 55nm LL Standard digital, analog and oscillator IO
IP