110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
- UMC
- 110nm
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
110nm BCD process Synchronous High-Density Single-Port SRAM Compiler
28nm HPM 1PRF with peri -LVT
UMC 28nm HPC process PG-2PRF with LVT and Bank 2
UMC 28nm HPC process PG-2PRF with LVT and Bank 2
UMC 28nm HPC process 2PRF with LVT and Bank 2
UMC 28nm HPC process 2PRF with LVT and Bank 2
UMC 28nm HPC process PG Two Port Register File with peri-LVT
UMC 28nm HPC process PG Two Port Register File with peri-LVT
UMC 28nm HPC process PG-2PRF with HVT Bank4
UMC 28nm HPC process PG-2PRF with HVT Bank4
UMC 28nm HPC process 2PRF, HVT & Bank2
UMC 28nm HPC process 2PRF, HVT & Bank2
UMC 28nm HPC process PG Two Port Register File with peri-HVT
UMC 28nm HPC process PG Two Port Register File with peri-HVT
UMC 28nm HPC process PG-2PRF with Bank4
UMC 28nm HPC process PG-2PRF with Bank4
UMC 28nm HPC process 2PRF with Bank2 & power gating
UMC 28nm HPC process 2PRF with Bank2 & power gating
UMC 28nm HPC process PG Two Port Register File
UMC 28nm HPC process PG Two Port Register File
UMC 28nm HPC Logic process PG One Port Register File with LVT
UMC 28nm HPC Logic process PG One Port Register File with LVT
UMC 28nm HPC Logic process PG-One Port Register File with HVT
UMC 28nm HPC Logic process PG-One Port Register File with HVT
UMC 28nm HPC Logic process PG One Port Register File
UMC 28nm HPC Logic process PG One Port Register File
UMC 28HPC process standard synchronous high density dual port SRAM memory compiler.
UMC 28HPC process standard synchronous high density dual port SRAM memory compiler.
UMC 28nm HPC process standard synchronous high density dual port SRAM memory compiler.
UMC 28nm HPC process standard synchronous high density dual port SRAM memory compiler.
UMC 28HPC process 1PRF compiler with LVT peripheral
UMC 28HPC process 1PRF compiler with LVT peripheral
UMC 28HPC 1PRF compiler with HVT peripheral
UMC 28HPC 1PRF compiler with HVT peripheral
UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler
UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler
UMC 28nm HPC process synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm HPC process synchronous LVT periphery high density single port SRAM memory compiler.