ZSP5000H is a programmable Vector Digital Signal Processor Core targeted for high performance Computer Vision and Image processin…
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Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
ZSP5000H is a programmable Vector Digital Signal Processor Core targeted for high performance Computer Vision and Image processin…
ZSP5000UL is a programmable Vector Digital Signal Processor Core for high performance computer vision and image processing applic…
ZSP5000 is a programmable Vector Digital Signal Processor Core for high performance computer vision and image processing applicat…
ZSPNano+ is a small, energy efficient, Digital Signal Processor Core for high performance Voice/Audio/Wireless applications.
Industry First, Silicon Proven, 116 Gbps per lane IP core, backed by a portfolio of verification tools, PHY interop, and demos Th…
Retimer that are Physical Layer protocol aware and that interoperate with any pair of Components with any compliant channel on ea…
The Camera Link® IP Core is a high-speed LVDS transmitter / receiver pair that conforms to the standard Camera Link protocol orig…
Ka-Band (24 - 33GHz) Zero-IF Transceiver
The ALTUS28TR is a integrated, mmWave, agile transceiver offering high performance and configurability for target applications in…
HEVC/AVC Dual-core video encoder
HEVC/AVC Dual-core video encoder
ACAP HDR Image Signal Processing Framework
The ACAP HDR Image Signal Processing Framework is intended to showcase a logicBRICKS IP suite implementation of High-Dynamic Rang…
Successive Approximation Register (SAR), interleaved 8-fold • Operating temperature 50 to 350 Kelvin • Radiation tolerant (TID > …
Successive Approximation Register (SAR), interleaved 8-fold • Operating temperature 50 to 350 Kelvin • Radiation tolerant (TID > …
CCSDS AR4JA LDPC Encoder and Decoder with code rates 1/2, 2/3, 4/5 and block sizes 1K, 4K, 16K
The IPrium-LDPC-CCSDS-AR4JA-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm…
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP
The maximum capacity of the Display Port 1.4 Rx IP Channel is supported.
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 55SP
The DisplayPort transmitter PHY version 1.4 can transmit data at rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2).
V-by-One Rx IP, Silicon Proven in 40G
Using internal equipment connections, the V-by-One HS technology seeks to send video signals at a high data rate.
V-by-One Tx IP, Silicon Proven in 40G
The V-by-One HS technology aims to transmit video signals at a high data rate using an internal connection between devices.
V-by-One/LVDS Tx Combo PHY, Silicon Proven in 28HPC+
V-by-One/ LVDS Tx Combo PHY IP Core aims at achieving high-speed data transmission for video signals through internal equipment c…
Latch-Up Protection Module with 2-inputs 3-Outputs - 7nm
The ODT-LUP-2I3O-7 is a latch-up detection solution that can support integration into FinFET process nodes such as N7.
Ultra low-power crystal-based 32 kHz oscillator
High accuracy 32 kHz Crystal oscillator with low-power consumption and low shutdown current to be used in the AON domain to imple…