The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
- MIPI C-PHY + 1
- TSMC
- 6nm
- N6FF
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC 12FFCP 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY, D-PHY, SLVDS RX- TSMC 12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.0 D-PHY v1.2 TX 2 trios/2 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
802.11ah IP - GLOBALFOUNDRIES 22nm FDX
The 802.11ah IP is a radio transceiver working on 863M~928MHz ISM frequency band.
This IP is a C-PHY/D-PHY Combo RX IP which can be flexibly configured as Slave D-PHY or C-PHY.
This IP is a C/D Combo PHY TX IP which can be flexibly configured as Master D-PHY or C-PHY.
This is a D-PHY RX IP compliant with the “MIPI Alliance Spec for D-PHY v1.2”.
This is a D-PHY Master IP compliant with the “MIPI Alliance Spec for D-PHY v1.2”.
This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.1/v1.2”, which consists of Bi-directional 1-Clock and 4-Data …
This Video DAC specifies a 3-channel 10-bit resolution, high performance, low power CMOS Digital-to-Analog Converter (DAC) which …
Video ADC - 12-bit Successive Approximation Register (SAR) ADC
The analog-to-digital converter is a differential high speed low power IP which uses Successive Approximation Register (SAR) arch…
This audio codec integrates 2-channel 24-bit sigma-delta ADCs and 2-channel 24-bit sigma-delta DACs, and fractional audio PLL to …
OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
D/AVE NX is the latest and most addition to the D/AVE family of rendering cores.
Produced by DRAM manufacturers such as Samsung and Micron, High Bandwidth Memory or HBM, provides users with high bandwidth, low …