112G Ethernet PHY, TSMC N6 x1, North/South (vertical) poly orientation
The 112G Ethernet PHY IP, an integral part of the 400GbE/800GbE Ethernet solution enables long reach (LR), medium reach (MR), ver…
112G Ethernet PHY, TSMC N5 x4, North/South (vertical) poly orientation
The 112G Ethernet PHY IP, an integral part of the 400GbE/800GbE Ethernet solution enables long reach (LR), medium reach (MR), ver…
112G Ethernet PHY, TSMC N3P x4 1.2V, North/South (vertical) poly orientation
The 112G Ethernet PHY IP, an integral part of the 400GbE/800GbE Ethernet solution enables long reach (LR), medium reach (MR), ver…
112G Ethernet LRM PHY, TSMC N3P x4, North/South (vertical) poly orientation
The 112G Ethernet PHY IP, an integral part of the 400GbE/800GbE Ethernet solution enables long reach (LR), medium reach (MR), ver…
14GHz Integer-N High-Speed PLL
1-VIA’s broad portfolio of general-purpose and optimized LC-PLLs offer a wide range of clocking solutions.
PCIe 7.0 PHY in TSMC (N5, N3P)
The multi-channel PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across back…
The multi-channel PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across back…
High performance dual-issue, out-of-order, 7-stage pipeline superscalar core
RiVAI-R1 is a dual-issue, Out-of-Order execution, 7-stage pipeline, 32-bit RISC-V CPU core IP that supports the RV32IMFAC instruc…
32-bit Multiprocessors with Level-2 Cache-Coherence
AndesCore™ A45MP 32-bit multicore CPU IP is an 8-stage superscalar processor based on AndeStar™ V5 architecture.
The 56G/64G PAM4 SERDES hard macro IP delivers a high-performance, low-power solution for high-speed serial interfaces.