MIPI D-PHY Tx 4 Lanes - GF12LP18, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
- MIPI D-PHY
- GlobalFoundries
- 12nm
- LP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
MIPI D-PHY Tx 4 Lanes - GF12LP18, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI D-PHY Rx 4 Lanes - GF12LP18, North/South Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Bidirectional 4 Lanes - GF 40LP 2.5V
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Bidirectional 2 Lanes - GF 40LP 2.5V
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Rx-Only 4 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Rx-Only 2 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Bidirectional 4 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Gen2 Bidirectional 2 Lanes - GF 28SLP 1.8V, East/West Poly Orientation
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI DPHY Bidirectional 4 Lanes - GF 22FDSOI18, N/S, for Automotive, ASIL B Random, AEC-Q100 Grade 1
The D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral d…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC7FF 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC6FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC6FF 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…