xSPI Master IP | NOR IP

This Universal NOR Flash IP supports a variety of NOR Devices and multiple Protocols, combines ease of use with high reliability, low power and speed under all conditions, including automotive applications.

The xSPI master IP supports the xSPI JESD251 standard from a standard AXI4 slave interface, and also features backwards compatibility support for Octal SPI, QSPI, DSPI, and SPI interfaces. Also supports JEDEC SFDP Standard. It is designed so that a user design may immediately access memory from the xSPI device in SPI mode, or alternatively issue a command to switch to any other mode. Additionally, a DMA command may be issued to copy memory from the xSPI device to anywhere else on the bus.

• JESD 251 compliant
  • Protocols 1 & 2
• JEDEC SFDP Compliant
• 8b and 4b xSPI
  • Octal SPI, QSPI, DSPI
  • Resets into SPI mode
  • 24 or 32b addressing
  • User selectable cmds
  • XIP high speed support
• AXI4 Execute in Place
  • Parameterized width
  • Full & Narrow burst
  • Max Bus Throughput
• AXI4 DMA Master
  • High speed bulk operations
  • Parameterized width
  • Full & Narrow burst
  • Max Bus throughput
  • Read straight to RAM

• xSPI Controller IP is an universal controller supporting all NOR Flash Devices.
• Total xSPI IP Solution includes xSPI Device, HDK & SW
• Low Gate Count & Low Power

• Verilog RTL Code
• Homogenous Verilog Test Environment
• Optional UVM Test Environment
• Synthesys Scripts
• xSPI Emulator suitable for integration testing
• Software Configuration Library
• User Guide
• Software configuration library