Vendor: Xilinx, Inc. Category: PCI Express

Virtex-5 Endpoint Block Plus Wrapper for PCI Express (PCIe)

Xilinx provides the ability to configure the FPGA Built-in Endpoint Block for PCIe available in Virtex-5 FPGAs.

Overview

Xilinx provides the ability to configure the FPGA Built-in Endpoint Block for PCIe available in Virtex-5 FPGAs. In addition to configuring the block, the core also provides all of the supplemental logic required to deliver a complete Endpoint solution for PCIe. This Xilinx Endpoint Block Plus Wrapper for PCIe simplifies the design process and reduces time-to-market. Many easy-to-use features and optimal configuration for Endpoint applications are available at no additional cost. This solution can be used in communication, multimedia, server and mobile platforms and enables applications such as high-end medical imaging, graphics intensive video games, DVD quality streaming video on the desktop and 10 Gigabit Ethernet interface cards. This core combined with other Xilinx connectivity solutions helps customers preserve their investment in older technologies by allowing seamless bridging to other standard and proprietary interfaces. All registered ISE users can request a license file by clicking the “Get License” button on this page.

Key features

  • Compliant with the PCI Express Base Specification 1.1
  • Fully compliant with PCI Express transaction ordering rules
  • Supports maximum payload of 512 bytes
  • 1 Virtual Channel
  • Support lane width, x1, x4 and x8
  • Bandwidth scalability interconnect width
  • Pre-implemented optimal buffering for high bandwidth applications
  • LocalLink User Interface for easy bridging to other Xilinx IP
  • Supports removal of corrupted packets for error detection and recovery
  • Uses Virtex-5 GTP/GTX Transceivers
  • Design verified by a Xilinx proprietary testbench
  • Tested at PCI-SIG compliance workshop and included on PCI Express Integrators List

Specifications

Identity

Part Number
Virtex-5 Endpoint Block Plus Wrapper for PCI Express (PCIe)
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: USA

Learn more about PCI Express IP core

How to design FPGA-based advanced PCI Express endpoint solutions

Currently dominating the desktop PC motherboard and graphics markets, the PCI Express protocol is poised to supplant PCI and PCI-X interface as the dominant high-bandwidth interconnect for the server, enterprise, mobile, workstation, networking, communica

Repeatable results with design preservation

Increasingly, FPGA designs are no longer just the 'glue logic' of the past; they are becoming more complex every year, often incorporating challenging such as PCI Express cores. Time spent trying to maintain timing in these modules is not only frustrating, but often unproductive as well. The design preservation flow solves this issue by allowing the customer to meet timing on the critical module(s) of the design and then reuse the implementation results in future iterations.

Frequently asked questions about PCIe IP cores

What is Virtex-5 Endpoint Block Plus Wrapper for PCI Express (PCIe)?

Virtex-5 Endpoint Block Plus Wrapper for PCI Express (PCIe) is a PCI Express IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this PCI Express?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PCI Express IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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