UMC L28HPM 28nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- UMC
- 28nm
- HPM
True Circuits develops and markets a broad range of industry leading PLLs, DLLs and DDR PHY hard macros for ICs for the semiconductor, systems and electronics industries. TCI's robust state-of-the-art circuits, methodical and proven design strategy, and close association with the world's leading foundries, IDMs, and design services companies allow the company to quickly and reliably create new and innovative designs in a variety of advanced process technologies. Over the last 27 years, True Circuits has distinguished itself as the technology leader in the timing IP space, and its PLLs and DLLs are used extensively around the world in its customers' products with production volumes well into the billions.
UMC L28HPM 28nm DDR DLL - 200MHz-1000MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
UMC L28HPM 28nm DDR DLL - 316MHz-1580MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
UMC L28HLP 28nm Spread Spectrum PLL - 96MHz-481MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HLP 28nm Spread Spectrum PLL - 192MHz-962MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HLP 28nm Spread Spectrum PLL - 384MHz-1920MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HPM 28nm Spread Spectrum PLL - 150MHz-750MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HPM 28nm Spread Spectrum PLL - 300MHz-1500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HPM 28nm Spread Spectrum PLL - 600MHz-3000MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L28HLP 28nm General Purpose PLL - 220MHz-1100MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
UMC L28HPM 28nm General Purpose PLL - 350MHz-1750MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN80GC 80nm General Purpose PLL - 160MHz-800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN80GT 80nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
TSMC CLN80HS 80nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
UMC L28HLP 28nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HLP 28nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HLP 28nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HPM 28nm Deskew PLL - 175MHz-875MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HPM 28nm Deskew PLL - 350MHz-1750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HPM 28nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L28HLP 28nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.