GF L55LPX 55nm General Purpose PLL - 120MHz-600MHz
True Circuits, Inc.
•
HQ:
USA
The General Purpose PLL is a wide range clock multiplier with deskew capability.
- GlobalFoundries
- 55nm
- LPx
Compare 2,151 True Circuits, Inc. IP Cores from 1 vendors
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TSMC CLN28HPCLVT 28nm General Purpose PLL - 440MHz-2200MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 28nm
- HPC
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TSMC CLN28HPC+LVT 28nm General Purpose PLL - 450MHz-2250MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 28nm
- HPC+
-
TSMC CLN16FF+GLLVT 16nm General Purpose PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 16nm
- FF+GL
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TSMC CLN16FF+LLLVT 16nm General Purpose PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 16nm
- FF+LL
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TSMC CLN16FFCLLLVT 16nm General Purpose PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 16nm
- FFCLL
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TSMC CLN7FFLVT 7nm General Purpose PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 7nm
- N7FF
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TSMC CLN7FF 7nm General Purpose PLL - 400MHz-2000MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 7nm
- N7FF
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GF L55LPX 55nm Deskew PLL - 60MHz-300MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- GlobalFoundries
- 55nm
- LPx
-
GF L55LPX 55nm Deskew PLL - 120MHz-600MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- GlobalFoundries
- 55nm
- LPx
-
GF L55LPX 55nm Deskew PLL - 240MHz-1200MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- GlobalFoundries
- 55nm
- LPx
-
TSMC CLN28HPCLVT 28nm Deskew PLL - 220MHz-1100MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 28nm
- HPC
-
TSMC CLN28HPCLVT 28nm Deskew PLL - 440MHz-2200MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 28nm
- HPC
-
TSMC CLN28HPCLVT 28nm Deskew PLL - 880MHz-4400MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 28nm
- HPC
-
TSMC CLN28HPC+LVT 28nm Deskew PLL - 225MHz-1125MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 28nm
- HPC+
-
TSMC CLN28HPC+LVT 28nm Deskew PLL - 450MHz-2250MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 28nm
- HPC+
-
TSMC CLN28HPC+LVT 28nm Deskew PLL - 900MHz-4500MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 28nm
- HPC+
-
TSMC CLN16FF+GLLVT 16nm Deskew PLL - 300MHz-1500MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 16nm
- FF+GL
-
TSMC CLN16FF+GLLVT 16nm Deskew PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 16nm
- FF+GL
-
TSMC CLN16FF+GLLVT 16nm Deskew PLL - 1200MHz-6000MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 16nm
- FF+GL