TSMC CLN4PLVT 4nm Clock Generator PLL - 300MHz-1500MHz
True Circuits, Inc.
•
HQ:
USA
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 4nm
- N4P
Compare 2,151 True Circuits, Inc. IP Cores from 1 vendors
-
-
TSMC CLN4PLVT 4nm Clock Generator PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 4nm
- N4P
-
TSMC CLN4PLVT 4nm Clock Generator PLL - 1200MHz-6000MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 4nm
- N4P
-
TSMC CLN4P 4nm Clock Generator PLL - 200MHz-1000MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 4nm
- N4P
-
TSMC CLN4P 4nm Clock Generator PLL - 400MHz-2000MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 4nm
- N4P
-
TSMC CLN4P 4nm Clock Generator PLL - 800MHz-4000MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 4nm
- N4P
-
TSMC CLN40FLOD 40nm Clock Generator PLL - 75MHz-375MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 40nm
- FLOD
-
TSMC CLN40FLOD 40nm Clock Generator PLL - 150MHz-750MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 40nm
- FLOD
-
TSMC CLN40FLOD 40nm Clock Generator PLL - 300MHz-1500MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 40nm
- FLOD
-
TSMC CLN40FL 40nm Clock Generator PLL - 37MHz-187MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 40nm
- FL
-
TSMC CLN40FL 40nm Clock Generator PLL - 75MHz-375MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 40nm
- FL
-
TSMC CLN40FL 40nm Clock Generator PLL - 150MHz-750MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 40nm
- FL
-
TSMC CLN3PLVT 3nm General Purpose PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe General Purpose PLL is a wide range clock multiplier with deskew capability.
- TSMC
- 3nm
- N3P
-
TSMC CLN3PLVT 3nm Deskew PLL - 300MHz-1500MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 3nm
- N3P
-
TSMC CLN3PLVT 3nm Deskew PLL - 600MHz-3000MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 3nm
- N3P
-
TSMC CLN3PLVT 3nm Deskew PLL - 1200MHz-6000MHz
True Circuits, Inc.• HQ: USAThe Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
- TSMC
- 3nm
- N3P
-
TSMC CLN3PLVT 3nm DDR DLL - 270MHz-1350MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 3nm
- N3P
-
TSMC CLN3PLVT 3nm DDR DLL - 360MHz-1800MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 3nm
- N3P
-
TSMC CLN3PLVT 3nm DDR DLL - 568MHz-2840MHz
True Circuits, Inc.• HQ: USAThe DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise f…
- TSMC
- 3nm
- N3P
-
TSMC CLN3PLVT 3nm Clock Generator PLL - 300MHz-1500MHz
True Circuits, Inc.• HQ: USAThe Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- TSMC
- 3nm
- N3P