The SHA-256 module implements both the SHA-256 and SHA-224 hash algorithms specified in FIPS PUB 180-4, the Secure Hash Standard.
- SHA2 (SHA-224) + 1
Systemyde (pronounced system-wide) International Corporation develops Intellectual Property (IP), in the form of synthesizable Verilog HDL models.
We specialize in Z80, Z180 and Z8000-compatible processors and peripheral controllers, although we have a broad range of design experience.
Our Verilog HDL models can be used in FPGA, ASIC or full custom implementations.
Systemyde designed all five generations of Rabbit microprocessors and have full core rights to these designs.
We also do custom design work. If you have a project please contact us.
The SHA-256 module implements both the SHA-256 and SHA-224 hash algorithms specified in FIPS PUB 180-4, the Secure Hash Standard.
The Dual HDLC controller provides two full-duplex HDLC channels, each with 512-byte data FIFO buffers for both directions.
The Y145 core is an exact copy of the Zilog Z80-SIO, having been created using the orginal Zilog schematics under contract for Zi…
Clean-room clone of Z180 TM CPU
Clean-room clone of Z180 TM CPU