UMC 28nm HPC process Two Port Register File with LVT and Bank4
Faraday Technology
•
HQ:
Taiwan
UMC 28nm HPC process Two Port Register File with LVT and Bank4
- UMC
- 28nm
- HPC
Compare 2,534 Faraday Technology IP Cores from 1 vendors
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UMC 28nm HPC process Two Port Register File with LVT and Bank2
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Two Port Register File with LVT and Bank2
- UMC
- 28nm
- HPC
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UMC 28nm HPC process Two Port Register File with peri LVT
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Two Port Register File with peri LVT
- UMC
- 28nm
- HPC
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UMC 28nm HPC process Two Port Register File with Bank2
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Two Port Register File with Bank2
- UMC
- 28nm
- HPC
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UMC 28nm HPC process 2PRF with Bank2
Faraday Technology• HQ: TaiwanUMC 28nm HPC process 2PRF with Bank2
- UMC
- 28nm
- HPC
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UMC 28nm HPC process Two Port Register File
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Two Port Register File
- UMC
- 28nm
- HPC
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UMC 28nm HPC process Dual Port SRAM compiler
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Dual Port SRAM compiler
- UMC
- 28nm
- HPC
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UMC 28nm HPC process Dual Port SRAM compiler
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Dual Port SRAM compiler
- UMC
- 28nm
- HPC
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UMC 40nm uLP process ULL One Port Register File memory compiler
Faraday Technology• HQ: TaiwanUMC 40nm uLP process ULL One Port Register File memory compiler
- UMC
- 40nm
- ULP
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UMC 40nm uLP process ULL Single-Port SRAM
Faraday Technology• HQ: TaiwanUMC 40nm uLP process ULL Single-Port SRAM
- UMC
- 40nm
- ULP
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UMC 40nm uLP Logic Process 1-Port Register File with Peri-HVT
Faraday Technology• HQ: TaiwanUMC 40nm uLP Logic Process 1-Port Register File with Peri-HVT
- UMC
- 40nm
- ULP
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UMC 40nm Low Power Process Dual-Port SRAM compiler with dual power rail
Faraday Technology• HQ: TaiwanUMC 40nm Low Power Process Dual-Port SRAM compiler with dual power rail
- UMC
- 40nm
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UMC 40nm Low Power Process Ultra High Speed One Port Register File memory compiler with dual rail
Faraday Technology• HQ: TaiwanUMC 40nm Low Power Process Ultra High Speed One Port Register File memory compiler with dual rail
- UMC
- 40nm
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40LP 2PRF with Sleep/Retention/Nap mode & peri LVT feature
Faraday Technology• HQ: Taiwan40LP 2PRF with Sleep/Retention/Nap mode & peri LVT feature
- UMC
- 40nm
- LP
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Faraday Technology• HQ: Taiwan
UMC 40nm Logic process standard Synchronous High Density Two Port Register File SRAM memory compiler.
- UMC
- 40nm
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UMC 40nm LP with power gating & peri-HVT 1PRF
Faraday Technology• HQ: TaiwanUMC 40nm LP with power gating & peri-HVT 1PRF
- UMC
- 40nm
- LP
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UMC 40nm Low Power Process PG SP-SRAM with Row redundancy for 213 bit cell
Faraday Technology• HQ: TaiwanUMC 40nm Low Power Process PG SP-SRAM with Row redundancy for 213 bit cell
- UMC
- 40nm
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40LP PG SP-SRAM LVT Peripheral with Row redundancy for 213 cell
Faraday Technology• HQ: Taiwan40LP PG SP-SRAM LVT Peripheral with Row redundancy for 213 cell
- UMC
- 40nm
- LP
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UMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-LVT
Faraday Technology• HQ: TaiwanUMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-LVT
- UMC
- 40nm
- LP
-
UMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-HVT
Faraday Technology• HQ: TaiwanUMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-HVT
- UMC
- 40nm
- LP