Faraday Technology IP Cores

DDR3 RTL PHY data module

• Controller + PHY + 1
• DDR3

DDR3 RTL PHY Address Command module

• Controller + PHY + 1
• DDR3

AHB-Lite Slave wrapper, it is a protocol converter from AHB to AHB lite.

• Protocol Bridge

Cipher coprocess for encryption/decryption of DES/Triple-DES/AES algorithm.

• Symmetric Crypto

ADC controller for Faraday internal use.

• ADC

8-bit micro-controller high speed 4clk/machine cycle architecture256 bytes of on-chip Data RAM,Three 16-bit timer/countersTwo 16-…

• MCU

USB3.0 OTG controller with AXI interface, support Host, Peripheral and OTG function

• USB

24-bit digital signal processor soft core.

• DSP Core

16-bit digital signal processor soft core.

• DSP Core

16-bit digital signal processor soft core.

• DSP Core

HJTC 0.11um pflash process standard synchronous high density single port SRAM memory compiler.

• SRAM

HJTC 0.11um uLL/pFlash Single Port SRAM compiler

• SRAM

HJTC 0.11um uLL/pFlash via1 ROM memory compiler.

• ROM

UMC 0.162um eFalsh/LL One Port Register File memory compiler

• Register File

UMC 0.162um eFalsh/LL Single-Port SRAM memory compiler

• SRAM

HJTC 0.18um pFlash Process synchronous High Density, Low Power mini single port SRAM

• SRAM

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

• SRAM

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

• SRAM

UMC 0.5um Logic process standard asynchronous low density low power two port (1R1W) SRAM memory compiler.

• SRAM

UMC 0.5um Logic process standard asynchronous high density single port SRAM memory compiler.

• SRAM