Vendor: Racyics GmbH Category: UCIe

Universal Chiplet Interconnect Express PHY IP - GLOBALFOUNDRIES® 22FDX®

UCIe PHY IP with X16 data width for standard package and up to 8 Gbit/s per pin data rate

GlobalFoundries 22nm FDX View all specifications

Overview

The Racyics UCIe PHY is an energy-efficient chiplet interconnect IP solution for consumer and automotive applications. Implemented in 22FDX technology, it supports 4 GT/s and 8 GT/s data rates while minimizing power consumption. The PHY is compliant with Automotive Grade 1 mission profiles and qualified on PDK-22FDX-PLUS-AutoPro150, ensuring reliable low-power operation in demanding automotive environments.

Key features

  • Delivered as Hardmacro IP
  • Implementation of the physical layer of the UCIe standard from Raw D2D Interface (RDI) to electrical interface of UCIe main band (MB) and sideband (SB) 
  • Includes TX and RX side
  • Support for UCIe-S (standard package) configuration with x16 data width 
  • Data rates of 8 Gbit/s per pin and 4 Gbit/s per pin with half rate clocking 
  • Integrated PLL for clock generation 
  • Integrated configuration and status register file with APB port
  • Integrated link training and resistance calibration
  • Automotive grade-1 reliability profile compliance with characterization corners from -40°C to 150°C
  • 130 µm bump pitch
  • Layout size 1143 x 1327.5 µm² (north/south chip edge)

What’s Included?

  • Datasheet with integration guidelines
  • Verilog simulation models
  • GDSII layout
  • LEF abstract
  • .lib/.db timing models
  • LVS netlist
  • EMIR analysis models

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 22nm FDX —

Specifications

Identity

Part Number
ri_uciephy_ gf22fdx
Vendor
Racyics GmbH
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Racyics GmbH
HQ: Germany

Learn more about UCIe IP core

Racyics extends its Silicon Proven ABB IP Portfolio

Clock generation is an essential part of every SoC. That’s why Racyics extends its silicon proven, fully Adaptive Body Bias enabled IP offering by adding an Ultra-Low-Voltage fast lock-in ADPLL and a 10 MHz, 5µW Ultra-Low-Power ADFLL Clock generator

Frequently asked questions about UCIe IP cores

What is Universal Chiplet Interconnect Express PHY IP - GLOBALFOUNDRIES® 22FDX®?

Universal Chiplet Interconnect Express PHY IP - GLOBALFOUNDRIES® 22FDX® is a UCIe IP core from Racyics GmbH listed on Semi IP Hub. It is listed with support for globalfoundries.

How should engineers evaluate this UCIe?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UCIe IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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