Vendor: CSEM Category: ADC

SAR ADC IP Portfolio

Cutting-edge semiconductor innovation with CSEM Our expertise in Analog-to-Digital Converter (ADC) technology spans process nodes…

UMC 55nm View all specifications

Overview

Cutting-edge semiconductor innovation with CSEM

Our expertise in Analog-to-Digital Converter (ADC) technology spans process nodes from 22 nm to 180 nm, including TSMC and Global Foundry designs. Engineered for precision, efficiency, and reliability, our IP portfolio is trusted clients, industry leaders, and foundries worldwide. Whether you are looking for tailored optimizations, our customizable IPs ensure seamless integration into your next-generation developments.

Portfolio overview

Feature Description
CMOS processes Available from 22 nm to 180 nm (TSMC and GF)
Effective Number of Bits (ENOB) Available from 8 b to 14 b
Sampling rate Up to 100 MS/s
Operating temperature range -40°C to 85°C
Designs Silicon-proven designs
Architecture Highly digital, enabling power vs sample rate scaling
Integrated solution Built-in references and biasing
Signal bandwidth Up to 50 MHz

ADC specifications

Process node Signal bandwidth ENOB Power supply Ana / IO [V] Power cons. [mW] Area [mm2]
22 40 MHz 10 1 / 0.8 0.8 0.1
22 24 MHz 8 0.9 0.29 0.06
22 5.0 MHz 12 1/0.8 0.8 0.1
22 1.25 MHz 13.5 1/0.8 0.8 0.1
55 500 KHz 10.2 1.8/1.2 0.1 0.175
55 400 KHz 10.8 0.9 0.025 0.27
130 1.0 MHz 9 1.5 0.435 0.16
180 1.0 MHz 9.2 1.8 0.27 0.086
180 400 KHz 10 1.8 0.135 0.012
180 2 MHz 8.8 1.8 0.18 0.066

Key features

  • Standard process (no analog option)
  • 0.5 V Digital & 0.9 V analog supplies
  • 12-bit SAR-based
  • Differential input signal range: 1.8 Vdiffpp
  • Sampling rate from 100 KS/s up to 1 MS/s
  • Power consumption scaling with frequency
  • Internal biasing system
  • Static performance: DNL < ±0.9 LSB; INL < ±1.5 LSB
  • Dynamic performance @ 1 MS/s: 66dB SNR at fin=100KHz; -72dB THD at fin=100 KHz
  • Ultra-low-power dissipation: only 25 uW excluding references
  • Compact die area: only 0.15 mm2 excluding references
  • Operating temperature range: - 40°C- 85°C
  • Power down current: < 10 nA typ

Benefits

  • High Accuracy: Our advanced design techniques that minimize noise and distortion, ensuring a precise digital representation of your analog signals.
  • Ultra-low-power consumption: Optimized for energy efficiency, our SAR ADCs reduce power consumption, extending battery life in portable and IoT applications.
  • Fast conversion rates: Engineered to handle high-speed signals with precision, delivering reliable performance in time-sensitive applications.
  • Customizable solutions: Whether for consumer electronics, automotive, or industrial use, our IPs can be tailored to meet your exact specifications. 

Applications

  • Low latency industrial designs
  • High bandwidth communication
  • CMOS imagers
  • Low latency industrial designs

Silicon Options

Foundry Node Process Maturity
UMC 55nm 55nm 550 nm —

Specifications

Identity

Part Number
SAR ADC IP Portfolio
Vendor
CSEM
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

CSEM
HQ: Switzerland

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Frequently asked questions about ADC IP cores

What is SAR ADC IP Portfolio?

SAR ADC IP Portfolio is a ADC IP core from CSEM listed on Semi IP Hub. It is listed with support for umc.

How should engineers evaluate this ADC?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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