Synopsys Advances Die‑to‑Die Connectivity with 64G UCIe IP Tape‑Out
Discover Synopsys 64G UCIe IP for energy-efficient, high-bandwidth die-to-die connectivity in advanced multi-die AI and HPC designs.
Vendor:
Omni Design Technologies, Inc.
Category:
UCIe
UCIe RX Interface
The ODT- UCIE-UNI-RX-16GXX-S8 is a low power D2D receiver IP in Samsung 8nm process.
Overview
The ODT- UCIE-UNI-RX-16GXX-S8 is a low power D2D receiver IP in Samsung 8nm process. With 16 lanes at 16GT/s, up to 256GT/s (32GBps) of data can be received from another chip within the same package, up to 25mm. UCIe sideband communications facilitate link bring-up and training without needing other interfaces. This unidirectional IP receives data using the Raw UCIe transport for 100% bandwidth efficiency with no retries. The interface presents 512-bits of receive data output.
Key features
- Receive-only UCIe Rev1.1 with FIFO Interface
- Samsung 8nm process
- Low power UCIe D2D
- 1 pJ/bit at 0.7V
- Mainband: 16GT/s per lane, 16 Rx Lanes
- < 1E-15 BER
- Sideband: 800MT/s, Tx, Rx, TxClk, RxClk
- UCIe-Standard Package support
- Channel Length up to 25 mm
- Functional from -40°C to 125°C
- Bump pitch: 130 um
- 30V CDM ESD
- Beach Front Density: 112 Gbps/mm
- 8GHz Integer PLL
- 100MHz Internal Reference Clock
- Differential clock Forwarding
- Link Training
- Low latency, High BW efficiency
- Statistics counters and error reporting
- Self-calibration
- Runtime recalibration
- Clock phase control
- Sideband messaging for link training and parameter exchange
- Descrambling
- Loopback BIST for KGD
- 8-bit SECDED ECC correction on every 64 bits
- APB interface for register management
Block Diagram
ODT-UCIe-UNI-RX-16GXX-S8 block diagram
Applications
- D2D Connectivity for MCM applications
- High integration for size-constrained mobile, aeronautic, and automotive systems
- High bandwidth at low power for battery- and self-powered systems
- Helps integrate massive amounts of data for signal processing and AI
- Peripheral hubs and interconnects
What’s Included?
- Datasheet
- PHY: Hard Macro (GDSII) for the PHY
- FIFO: RTL, Synthesis Scripts
- Abstract View (LEF) for top level connectivity
- System Verilog Behavioral Model
- Integration and Customer Support
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| Samsung | 8nm | 8nm 80 nm | — |
Specifications
Identity
Part Number
ODT-UCIe-UNI-RX-16GXX-S8
Vendor
Omni Design Technologies, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about UCIe IP cores
What is UCIe RX Interface?
UCIe RX Interface is a UCIe IP core from Omni Design Technologies, Inc. listed on Semi IP Hub. It is listed with support for samsung.
How should engineers evaluate this UCIe?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UCIe IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.