Vendor: Lattice Semiconductor Corp. Category: Channel Coding

Turbo Decoder

Turbo coding is an error correction technique widely used in the communications industry.

Overview

Turbo coding is an advanced error correction technique widely used in the communications industry. Turbo encoders and decoders are key elements in today's communication systems to achieve the best possible data reception with the fewest possible errors. The basis of turbo coding is to introduce redundancy in the data to be transmitted through a channel. The redundant data helps to recover original data from the received data. In data transmission, turbo coding helps achieve near Shannon limit performance.

Lattice provides a Turbo Decoder IP core that is both flexible and compliant with two different standards, 3GPP and CCSDS. 3GPP is widely used in WCDMA and MC-CDMA applications while CCSDS is most commonly found in telemetry and space communications.

Lattice also supplies users with a Turbo Encoder core providing users a complete state of the art error correction solution.

Key features

  • Compliant with Standards:
    • 3GPP TS 25.212 version 4.2.0
    • CCSDS 101.0-B-5
  • Throughput of 2Mbps for 3GPP at 30MHz, 7 Iterations
  • Two's Complement Data/Parity Input
  • Supports Depuncturing
  • Variable Soft-Widths for Input Symbols, Branch Metrics, Path Metrics and LLRs
  • User-Defined Number of States
  • Variable Block Sizes During Runtime
  • Programmable Number of Iterations
  • Optional Hard Decision Storage
  • Selectable Max-Log-Map or Log-Map Algorithm
  • Programmable Pipe Stages for Convenient Memory Interfacing
  • Optional Double Buffering

Block Diagram

Specifications

Identity

Part Number
TURBO-DECO
Vendor
Lattice Semiconductor Corp.
Type
Silicon IP

Files

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Provider

Learn more about Channel Coding IP core

Lattice Collaborates with TI to Accelerate Edge AI for Robotics and Industrial Applications

The collaboration demonstrates a real-time AI sensor fusion architecture that integrates TI mmWave radar and camera sensors using NVIDIA Holoscan Sensor Bridge running on Lattice’s low power FPGA. The FPGA acts as a companion chip delivering synchronized sensor data directly into GPU-accessible memory to enable low-latency and robust perception for robotics and industrial edge AI applications.

Frequently asked questions about Channel Coding IP cores

What is Turbo Decoder?

Turbo Decoder is a Channel Coding IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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