VeriSilicon Introduces GLTiny™ 3D GPU Programming Model for Ultra-Low-Power, Memory-Efficient Wearable Devices
Optimized GLTiny Model Brings Rich 3D Graphics to Resource-Constrained Wearable Devices Powered by OpenGL ES GPUs
This analog 2-1 MUX is designed for low speed application.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 55nm | GP | Pre-Silicon |
TSMC 55nm Analog 2-1 MUX is a Analog Front End IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Analog Front End IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.