TSMC 40 ULP Combo voltage regulator combining a linear regulator for active mode with an ultra-low quiescent regulator for sleep mode
Combo voltage regulator designed in TSMC 40 ULP, combining a linear regulator for active mode with an ultra-low quiescent regulat…
Overview
Key features
- Embedded RCU (Regulator Control Unit) to manage booting and safe mode transitions
- Configurable LDO output current to fit the application (from 100 mA to 500 mA)
- Low Bill-of-Material: fully integrated feedback and active compensation loop to reduce the number of additional external passive components
- Low Output Ripple
- Low quiescent current for AON supply with stringent power consumption constraints in sleep mode
- Embedded Level Shifter
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 40nm | ULP | Pre-Silicon |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about LDO Voltage Regulator IP cores
What is TSMC 40 ULP Combo voltage regulator combining a linear regulator for active mode with an ultra-low quiescent regulator for sleep mode?
TSMC 40 ULP Combo voltage regulator combining a linear regulator for active mode with an ultra-low quiescent regulator for sleep mode is a LDO Voltage Regulator IP core from Dolphin Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.
How should engineers evaluate this LDO Voltage Regulator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LDO Voltage Regulator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.