Overview
Targeted in SMIC 0.13μm 1.2v/3.3v logic process, this IP integrates five sub-modules: 1.8~3.3v(1.62~3.6V) to 1.2v Regulator, 200MHz Ring Oscillator and three POR (Power On Reset) cores to detect 3.3v, 1.8v or 1.2v input separately. The Regulator is to provide 1.2v power supply which is regulated from the single 3.3v supply and the 3.3v supply input can drop to 1.62v minimum. The maximum output current is 100mA. The Ring Oscillator is to output 200MHz stable clock without any external components. The reference control voltage is from the prior Regulator. The output frequency can be fairly accurate (±10%) by trimming the resistance in case of any process variations. With the 0.6v bandgap reference voltage from the Regulator, the three PORs can each detect one of three different voltage inputs: 3.3v, 1.8v or 1.2v separately, and output a flag when detected voltage reaches the trigger point. This particular physical IP has the scaled up version of S13V33_MMC_05C which is designed to be used in foundry’s 0.11um (90% shrink) process.
Learn more about Mixed Signal Subsystem IP core
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