Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Standard Cell Libraries

SMIC 0.13um Low Leakage 6 track High Density Multi-Bits Flip-Flop

SMIC 130nm G Silicon Proven View all specifications

Key features

  • SMIC 0.13um Low Leakage
  • Special Cell Library for Multi-Bit Flip-Flop application
  • Ultra Low Voltage

Silicon Options

Foundry Node Process Maturity
SMIC 130nm G Silicon Proven

Specifications

Identity

Part Number
SMIC13LL 6T STD cells MBFF
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Learn more about Standard Cell Libraries IP core

VeriSilicon and Google Jointly Launch Open-Source Coral NPU IP

The Coral NPU is built on the open RISC-V instruction set architecture, featuring native tensor processing capabilities, supporting mainstream machine learning frameworks such as JAX, PyTorch, and TensorFlow Lite (TFLite), and utilizing open-standard tools like Multi-Level Intermediate Representation (MLIR) from the Low Level Virtual Machine (LLVM) project for compiler infrastructure.

Frequently asked questions about standard cell libraries

What is SMIC 0.13um Low Leakage 6 track High Density Multi-Bits Flip-Flop?

SMIC 0.13um Low Leakage 6 track High Density Multi-Bits Flip-Flop is a Standard Cell Libraries IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic Silicon Proven.

How should engineers evaluate this Standard Cell Libraries?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Standard Cell Libraries IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP