Timing Fragility Aware Selective Hardening of RISCV Soft Processors on SRAM Based FPGAs
This paper introduces a timing fragility aware selective hardening methodology for RISCV soft processors implemented on SRAM based FPGAs.
Vendor:
Numem
Category:
SRAM
SmartMem Subsystem IP
Fully synthesizable and configurable memory subsystem IP that enables significant improvement in power, performance and endurance…
Overview
Fully synthesizable and configurable memory subsystem IP that enables significant improvement in power, performance and endurance not only for NuRAM but also other third party MRAMs as well as RRAM, PCRAM and Flash
Key features
- SmartMem IP improves ease-of-use and high-volume deployment by enabling significant performance and endurance improvement along with optional and customizable SOC Compute in Memory.
- In addition to NuRAM, SmartMem provides similar benefits for other memories such as 3rd party MRAM, RRAM, PCRAM and embedded Flash.
Block Diagram
SmartMem Subsystem IP block diagram
Specifications
Identity
Part Number
SmartMem Subsystem IP
Vendor
Numem
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about SRAM IP cores
What is SmartMem Subsystem IP?
SmartMem Subsystem IP is a SRAM IP core from Numem listed on Semi IP Hub.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.