ISO26262 ASIL-B/D Compliant 32-bit RISC-V Core
The AndesCore™ D23-SE is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with …
- RISC-V
ISO26262 ASIL-B/D Compliant 32-bit RISC-V Core
The AndesCore™ D23-SE is a 32-bit 3-stage pipeline CPU IP core based on AndeStar™ V5 architecture for embedded applications with …
512-bit Vector DSP IP, Single Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
512-bit Vector DSP IP, Quad Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
512-bit Vector DSP IP, Dual Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
256-bit Vector DSP IP, Single Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
128-bit Vector DSP IP, Single Core with Functional Safety
The ASIL B and C compliant ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) design…
ARC-V RMX Series Functional Safety Processor IP
The ARC-V™ RMX-110-FS and RMX-510-FS Functional Safety Processors simplify development of safety-critical applications and accele…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC7FF 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC6FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC6FF 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes - TSMC16FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes - TSMC12FFC 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes - TSMC N7 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…
MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes - TSMC N7 1.8V, North/South Poly Orientation
The integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors,…