10/12-bit SAR ADC

The SAR ADC IP is a small-size, low power analog to digital converter which leverages charge-redistribution successive approximation technology. It offers a reliable solution of analog-to-digital signal conversion for general application.

The SAR ADC IP consists of input MUX, ADC core, and digital logic. The input MUX selects the analog signal to be converted from input channels. The ADC core converts the selected analog signal to its digital counterpart. The digital logic controls the ADC operation.

• 10/12-bit resolution
• Up to 5MS/s sampling rate
• Supports 1~16 single-ended or differential input channels
• Supports standard I/O cell multiplex
• Supports external or internal reference
• Low power consumption
• The area correlates strongly with process node and input channel count. Please refer to the detailed datasheet

• Low power consumption
• Fully customizable
• Small area
• Simple integration process
• Available options include
  • Test chips and test boards
  • Chip level integration

• Industrial Automation
• Automotive
• Consumer Electronics
• Medical Devices

• Databook and detailed physical implementation guides
• Complete set of timing models
• Library Exchange Format (LEF)
• Encrypted Verilog Models
• Layout vs. Schematic (LVS) report
• GDSII database