Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode
RAR-eSR-iLR-04 Retention Alternating Regulator enables this combination embedding two regulation sub-components: a switching regu…
Overview
Key features
- Ideal regulator for power and voltage islets
- Embedded RCU (Regulator Control Unit) to manage booting and mode transitions and to ensure data integrity
- Configurable output drive before delivery to fit the application
- Performances in sleep mode: accessible voltage reference can be used by wake-up circuitry
- Performances in normal mode: PFM embedded mode allowing high-efficiency at low load
- High Efficiency (up to 95% peak efficiency)
- Low Bill-of-Material: fully integrated feedback and active compensation loop to reduce the number of additional external passive components
- Low Output Ripple
- Over-temperature/Over-current protected Output
Block Diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 180nm | BCDG2 | Pre-Silicon |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about LDO Voltage Regulator IP cores
What is Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode?
Retention Alternative Regulator, combines high efficiency in normal mode and ultra-low quiescent current for sleep mode is a LDO Voltage Regulator IP core from Dolphin Semiconductor listed on Semi IP Hub. It is listed with support for tsmc Pre-Silicon.
How should engineers evaluate this LDO Voltage Regulator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LDO Voltage Regulator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.