TaraCom announces GPON SerDes IP PHY in 90 nm process
TaraCom has ported the Serial ATA (SATA) core intellectual core property (IP) for integration into SoC and ASIC design.
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 90nm | CIS | — |
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Quad 3.125/6.25 Gbps Backplane SerDes is a Multi-Protocol PHY IP core from TaraCom Integrated Products, Inc. listed on Semi IP Hub. It is listed with support for tsmc.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Multi-Protocol PHY IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.