TaraCom announces GPON SerDes IP PHY in 90 nm process
TaraCom has ported the Serial ATA (SATA) core intellectual core property (IP) for integration into SoC and ASIC design.
Vendor:
TaraCom Integrated Products, Inc.
Category:
Multi-Protocol PHY
Quad 1.06/1.25/2.125/1.56/2.5/3.125 Gbps Backplane SerDes
TRC3104SBA is a Quad SerDes transceiver device, capable of transmitting 1.06 to 3.125Gb/s signals over Backplane, Fiber Channel, …
Overview
TRC3104SBA is a Quad SerDes transceiver device, capable of transmitting 1.06 to 3.125Gb/s signals over Backplane, Fiber Channel, and cupper cables. It uses single and double data rate capability. One 1.8V supply can power the core and I/Os. It has Comma detector, low jitter clock synthesizer, 8B/10B converter, selectable pre-emphasis and equalizer, CDR PLL, BIST and loopback functions for testing, and needs only 3 external resistors for setting bias current. It is also available as core (named TRC3104CBA).
Key features
- Quad channel optimized for backplane , but can be used for FC and cable applications as well.
- Data rate 1 to 3.125Gb/s on high speed differential lines.
- Jitter tolerance of 0.72UIpp, and Jitter generation of 0.19UIpp.
- On chip 8bit/10bit encoder/decoder.
- selectable equalizer and pre-emphasis.
- Loopback abd BIST function (PRBS7 pattern).
- On chip JTAG and MDIO for test and setup.
- 256 pin PBGA package with 400mW per channel Pd.
Block Diagram
TRC3104CBA block diagram
What’s Included?
- TRC3104SBA stand alone chip.
- TRC3104CBA core.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 180nm | BCDG2 | — |
Specifications
Identity
Part Number
TRC3104CBA
Vendor
TaraCom Integrated Products, Inc.
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about Multi-Protocol PHY IP core
TaraCom Introduces SerDes/PHY IPs in 90 and 65-Nanometer
TaraCom has ported the Serial ATA (SATA) core intellectual core property (IP) for integration into SoC and ASIC designs ranging from XAUI compliant, PCS/PMD functionality of the 10 Gigabit Ethernet XAUI and 10 Gigabit Fibre Channel specs as well as SATA,
Frequently asked questions about Multi-Protocol PHY IP cores
What is Quad 1.06/1.25/2.125/1.56/2.5/3.125 Gbps Backplane SerDes?
Quad 1.06/1.25/2.125/1.56/2.5/3.125 Gbps Backplane SerDes is a Multi-Protocol PHY IP core from TaraCom Integrated Products, Inc. listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this Multi-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Multi-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.