Vendor: NTLab Category: Power Management Unit

Power Management Unit (1.1 - 1.4V output voltage, load current 5 mA)

055TSMC_PMU_01 is designed to form stabilized voltage with overcurrent indication (bit Status).

TSMC 55nm GP Silicon Proven View all specifications

Overview

055TSMC_PMU_01 is designed to form stabilized voltage with overcurrent indication (bit Status). The block has configurable output voltage (1.1/1.2/1.3/1.4V) with parameters specified for 5 mA output current. The Status bit is set to "1", when the load current is greater than 15 mA.

Key features

  • TSMC CMOS 55 nm
  • Output voltage: 1.1 ... 1.4 V
  • Low current consumption
  • Overcurrent indication
  • Low voltage drop

Block Diagram

Applications

  • Supply voltage sensitive circuits
  • Power solutions
  • Clocking systems

What’s Included?

  • Schematic or NetList
  • Abstract view (.lef and .lib files)
  • Layout (optional)
  • Verilog behavior model
  • Extracted view (optional)
  • GDSII
  • DRC, LVS, antenna report
  • Test bench with saved configurations (optional)
  • Documentation

Silicon Options

Foundry Node Process Maturity
TSMC 55nm GP Silicon Proven

Specifications

Identity

Part Number
055TSMC_PMU_01
Vendor
NTLab
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Lithuania

Learn more about Power Management Unit IP core

Semiconductor IP FAQ

What is Power Management Unit (1.1 - 1.4V output voltage, load current 5 mA)?

Power Management Unit (1.1 - 1.4V output voltage, load current 5 mA) is a Power Management Unit IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this Power Management Unit?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power Management Unit IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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