Vendor: Beyond Semiconductor Category: Protocol Bridge

PCI 32 Bridge Controller

Today, the PCI bus is the number-one device connectivity standard on the market to integrate modern embedded applications into bi…

Contact Provider Request Datasheet

Overview

Today, the PCI bus is the number-one device connectivity standard on the market to integrate modern embedded applications into bigger systems. The Beyond PCI Bridge IP Core is built according to PCI specification Rev. 2.2 (or lower) and provides a backend connection that is WISHBONE open-standard compatible. Since standardized backend is rarely seen in common IP cores, the architecture-independent interface, which can be used in a wide variety of applications, is the PCI Bride IP Core’s major benefit.

Key features

  • PCI 2.2 compliant 32bit, 66MHz Initiator and Target interface
  • Zero wait state burst operation
  • Parameterized number of synthesizable, fully programmable images (default one, maximum 6 images) with address translation capability and 4KB to 1GB image size for access from PCI bus to address space on WISHBONE bus
  • Programmable image address space mapping (I/O or memory space)
  • PCI transaction ordering requirements; use of posted writes and delayed reads in either direction
  • Single delayed transaction support in either direction
  • Supported initiator functions:
    • Memory Read, Memory Read Line, Memory Read Multiple, Memory Write commands
    • IO Read and Write commands
    • Configuration Read and Write commands: Interrupt Acknowledge command; Support of linear burst ordering
  • Supported Target functions:
    • Memory Read, Memory Read Line, Memory Read Multiple, Memory Write, Memory Write and Invalidate commands
    • IO Read and Write commands
    • Configuration Read and Write commands
  • Support of linear burst ordering
  • Software configurable support for memory access optimizing commands
  • Fully transparent WISHBONE interface operation, controllable on image by image basis with proper software settings of configuration registers

Applications

  • Internet, networking and telecom
  • Embedded
  • Home entertainment consumer electronics

What’s Included?

  • Soft core RTL in Verilog
  • Test bench in Verilog
  • Engineering support

Specifications

Identity

Part Number
PCI 32 Bridge Controller
Vendor
Beyond Semiconductor
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Beyond Semiconductor
HQ: Slovenia
Contact Beyond Semiconductor

Learn more about Protocol Bridge IP core

A comparison of Network-on-Chip and Busses

This whitepaper summarizes the limitations of traditional bus-based approaches, introduces the advantages of the generic concept of NoC, and provides specific data about Arteris’ NoC, the first commercial implementation of such architectures

IP Core for an H.264 Decoder SoC

This paper presents the development of an IP core for an H.264 decoder. This state-of-the-art video compression standard contributes to reduce the huge demand for bandwidth and storage of multimedia applications. The IP is CoreConnect compliant and implements the modules with high performance constraints.

Frequently asked questions about Protocol Bridge IP cores

What is PCI 32 Bridge Controller?

PCI 32 Bridge Controller is a Protocol Bridge IP core from Beyond Semiconductor listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP