High Performance Embedded Host NVMe IP Core
The IPM-NVMe_Host core is a verilog IP to be integrated in a FPGA or ASIC design.
Overview
The IPM-NVMe_Host core is a verilog IP to be integrated in a FPGA or ASIC design. It fully manages the NVMe and PCIe protocol on the host side without requiring any CPU and any specific knowledge. It can be used with any NVMe SSD available on the market, or with a custom design based on the IPM-NVMe_Device IP .
The IPM-NVMe_Host is well suited for embedded applications requiring a high throughput storage such as recorder and video applications. 1+ million IOPS performance requires the use of an expensive CPU, which is not feasible in an embedded system due to cost, space and power limitation.
Using the pre-validated IPM-NVMe_Host IP core greatly reduces time-to-market for storage OEM; this allows the OEM to benefit from a powerful data transfer manager. The IPM-NVMe_Host IP core is full featured and easy to use with multiple application interface such as AXI or RAM-like.
Description
The architecture of the Host NVM Express IP is based on 4 main blocks:
- Automatic init engine: PCIe and NVMe device initialization, hardware discovering
- User Interface: memory configuration and input for the transfer request by the API
- NVMe command manager: translation of the data request from API into a NVMe command. Submission and completion pointers management
- Data Transfer Engine: management of the data transfer between the NVMe SSD and the FIFO/memory
It delivers very low latency since it is a full hardware host NVMe implementation. That takes only few dozens of clock cycles (compared to multiple thousands of clock cycles for a software NVMe driver on a CPU). In addition, there is no needs of PCIe interrupt management because it is directly processed by the Host NVMe manager, therefore avoiding context switches.
Key features
- Automatic PCIe/NVMe initialization
- RAM or AXI4 or Avalon interface
- Scalable architecture
- options:
- Opal 2.0 management
- multiple queues management
Block Diagram
Benefits
- NVM Express Compliant
- Automatic PCIe/NVMe init
- Up to PCIe Gen 3x8
- IO read/write and shutdown commands
- FIFO or AXI4 or Avalon interface
- 128 or 256 bits data path
Applications
- PCIe SSD
What’s Included?
- Verilog RTL source code
- Low level firmware
- Synthesis scripts
- Technical documentation
- Technical support
Specifications
Identity
Videos
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about NVMe Controller IP cores
What is High Performance Embedded Host NVMe IP Core?
High Performance Embedded Host NVMe IP Core is a NVMe Controller IP core from IP-Maker listed on Semi IP Hub.
How should engineers evaluate this NVMe Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NVMe Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.