Overview
The Atria Logic AL-MPEG2E-SW is a software-based, low power MPEG-2 Main Profile video encoder IP core, targeted for mobile and non-mobile, low power devices in industrial and medical applications. Industrial applications include broadcast contribution portable video recorders and train/bus/truck/airplane black box recorders. Medical applications include operating theater recorders, as well as PACS video archiving.
The encoder supports MPEG-2 Main Profile at Low and Main Level IPB encoding up to SD resolutions, and supports both single-pass variable bit rate (VBR) and constant bit rate (CBR) encoding. Support for rate distortion optimization for mode decisions provides exceptional video quality at low bit rates. The encoder is fully MPEG-2 standards compliant.
The implementation includes power-optimizing algorithms that enable the encoder to run at very low power in a Linux or MS Windows environment on a wide range of ARM processors, such as ARM7, ARM9, ARM9E and ARM11, as well as on the EZchip Tilera TilePro64 processors.
Learn more about Video Processing IP core
Numerous industries in broadcast, cable, videoconferencing and consumer electronics space are using H.264 as the video codec of choice for their products and services. The H.264/AVC video coding standard achieves a significant improvement in coding efficiency with increased computational complexity relative to former standards.
This article describes the use of a low-cost, low-density Zynq FPGA in creating a computational platform for implementing infotainment systems for passenger vehicles, such as cars, buses, trains, airplanes and ships. Other applications for this kind of platform include digital signage and information displays in private and public venues such as hotels, hospitals, gas pumps, or kiosks as well as digital picture frames for consumer markets.
With ever increasing need for very high operating frequency of graphics (GPU) or general purpose (CPU) processors, the limited memory bandwidth forms a bottleneck to extract maximum performance out of a system. To add to this, low power consumption, form factor of the memory devices also play significant roles in optimal and efficient solutions.
High Bandwidth Memory (HBM) is a high-performance 3D-stacked DRAM. It is a technology which stacks up DRAM chips (memory die) vertically on a high speed logic layer which are connected by vertical interconnect technology called TSV (through silicon via) which reduces the connectivity impedance and thereby total power consumption.
