Vendor: M31 Technology Corp. Category: MIPI PHY

MIPI TX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation

MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices.

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MIPI D-PHY TSMC 12nm FFC View all specifications

Overview

MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve throughput over bandwidth limited channel, the C-PHY is developed and is delivering 2.28 bits per symbol over three-wire trio. As a MIPI Alliance contributor and leading Interface IP provider, M31 provides a silicon-proven, low-power and low cost C-PHY/D-PHY combo IP on various process nodes. Users can configure the PHY into D-PHY mode or C-PHY mode to support different applications using the same PHY. It is compliant to the PPI interface which allows seamless integration with upside controllers for Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols.

Key features

  • Compliant with MIPI D-PHY v2.5 and C-PHY v2.0 specifications
  • Supports MIPI DSI and CSI-2 protocols
  • Supports HS data rates up to 6Gbps (6Gsps) per lane (per trio)
  • Supports LS data rate of 10Mbps and Ultra-low power modes
  • Supports D-PHY mode with 1 clock lane & up to 4 data lanes
  • Supports C-PHY mode up to 3 trios for TX and 4 trios for RX
  • Supports extra RX mode with 2 sets of 1 clock lane & up to 2 data lanes
  • Supports Alternate Low-Power (ALP) mode
  • Provides D-PHY swap function for clock and data lane
  • Provides C-PHY swap function for trio
  • Provides a stand-alone BIST module for at-speed mass production testing
  • Certified with ASIL-B of ISO-26262

Block Diagram

MIPI TX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation block diagram

Silicon Options

Foundry Node Process Maturity
TSMC 12nm FFC —

Specifications

Identity

Part Number
MIPI TX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation
Vendor
M31 Technology Corp.
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI D-PHY

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Contact M31 Technology Corp.

Learn more about MIPI PHY IP core

M31 on the Specification and Development of MIPI Physical Layer

MIPI is the abbreviation of "Mobile Industry Processor Interface". This article will introduce the physical layer specifications of MIPI architecture, and explain the features and benefits of D-PHY and C-PHY respectively. Then, the MIPI perspective on the development and challenges of automotive electronics and the professional MIPI technical services that M31 can provide will be shared.

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

Frequently asked questions about MIPI PHY IP

What is MIPI TX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation?

MIPI TX CPHY_v2.0 / DPHY_v2.5, 3-TRIO/1C4D, TSMC 12FFC, E/W orientation is a MIPI PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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